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driver/i2s: refactor ll and hal

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This commit is contained in:
laokaiyao
2021-07-20 21:03:52 +08:00
parent d51b85989b
commit 3c57a6ac36
16 changed files with 1871 additions and 1407 deletions
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191
components/hal/esp32s2/include/hal/i2s_ll.h
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@@ -66,7 +66,7 @@ static inline void i2s_ll_enable_clock(i2s_dev_t *hw)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable tx msb right
*/
static inline void i2s_ll_tx_msb_right_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_tx_enable_msb_right(i2s_dev_t *hw, bool enable)
{
hw->conf.tx_msb_right = enable;
}
@@ -77,7 +77,7 @@ static inline void i2s_ll_tx_msb_right_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable rx msb right
*/
static inline void i2s_ll_rx_msb_right_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_rx_enable_msb_right(i2s_dev_t *hw, bool enable)
{
hw->conf.rx_msb_right = enable;
}
@@ -88,7 +88,7 @@ static inline void i2s_ll_rx_msb_right_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable send right channel first
*/
static inline void i2s_ll_tx_right_first_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_tx_enable_right_first(i2s_dev_t *hw, bool enable)
{
hw->conf.tx_right_first = enable;
}
@@ -99,7 +99,7 @@ static inline void i2s_ll_tx_right_first_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable receive right channel first
*/
static inline void i2s_ll_rx_right_first_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_rx_enable_right_first(i2s_dev_t *hw, bool enable)
{
hw->conf.rx_right_first = enable;
}
@@ -110,7 +110,7 @@ static inline void i2s_ll_rx_right_first_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable tx fifo module
*/
static inline void i2s_ll_tx_fifo_mod_force_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_tx_force_enable_fifo_mod(i2s_dev_t *hw, bool enable)
{
hw->fifo_conf.tx_fifo_mod_force_en = enable;
}
@@ -121,7 +121,7 @@ static inline void i2s_ll_tx_fifo_mod_force_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param enable Set true to enable rx fifo module
*/
static inline void i2s_ll_rx_fifo_mod_force_en(i2s_dev_t *hw, bool enable)
static inline void i2s_ll_rx_force_enable_fifo_mod(i2s_dev_t *hw, bool enable)
{
hw->fifo_conf.rx_fifo_mod_force_en = enable;
}
@@ -132,7 +132,7 @@ static inline void i2s_ll_rx_fifo_mod_force_en(i2s_dev_t *hw, bool enable)
* @param hw Peripheral I2S hardware instance address.
* @param slave_en Set true to enable slave mode
*/
static inline void i2s_ll_set_tx_slave_mod(i2s_dev_t *hw, bool slave_en)
static inline void i2s_ll_tx_set_slave_mod(i2s_dev_t *hw, bool slave_en)
{
hw->conf.tx_slave_mod = slave_en;
}
@@ -143,7 +143,7 @@ static inline void i2s_ll_set_tx_slave_mod(i2s_dev_t *hw, bool slave_en)
* @param hw Peripheral I2S hardware instance address.
* @param slave_en Set true to enable slave mode
*/
static inline void i2s_ll_set_rx_slave_mod(i2s_dev_t *hw, bool slave_en)
static inline void i2s_ll_rx_set_slave_mod(i2s_dev_t *hw, bool slave_en)
{
hw->conf.rx_slave_mod = slave_en;
}
@@ -153,7 +153,7 @@ static inline void i2s_ll_set_rx_slave_mod(i2s_dev_t *hw, bool slave_en)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_tx(i2s_dev_t *hw)
static inline void i2s_ll_tx_reset(i2s_dev_t *hw)
{
hw->conf.tx_reset = 1;
hw->conf.tx_reset = 0;
@@ -164,7 +164,7 @@ static inline void i2s_ll_reset_tx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_rx(i2s_dev_t *hw)
static inline void i2s_ll_rx_reset(i2s_dev_t *hw)
{
hw->conf.rx_reset = 1;
hw->conf.rx_reset = 0;
@@ -175,7 +175,7 @@ static inline void i2s_ll_reset_rx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_tx_fifo(i2s_dev_t *hw)
static inline void i2s_ll_tx_reset_fifo(i2s_dev_t *hw)
{
hw->conf.tx_fifo_reset = 1;
hw->conf.tx_fifo_reset = 0;
@@ -186,7 +186,7 @@ static inline void i2s_ll_reset_tx_fifo(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_rx_fifo(i2s_dev_t *hw)
static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw)
{
hw->conf.rx_fifo_reset = 1;
hw->conf.rx_fifo_reset = 0;
@@ -198,7 +198,7 @@ static inline void i2s_ll_reset_rx_fifo(i2s_dev_t *hw)
* @param hw Peripheral I2S hardware instance address.
* @param src I2S source clock
*/
static inline void i2s_ll_set_tx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
{
hw->clkm_conf.clk_sel = (src == 1) ? 1 : 2;
}
@@ -209,7 +209,7 @@ static inline void i2s_ll_set_tx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
* @param hw Peripheral I2S hardware instance address.
* @param src I2S source clock
*/
static inline void i2s_ll_set_rx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
{
hw->clkm_conf.clk_sel = (src == 1) ? 1 : 2;
}
@@ -220,7 +220,7 @@ static inline void i2s_ll_set_rx_clk_src(i2s_dev_t *hw, i2s_clock_src_t src)
* @param hw Peripheral I2S hardware instance address.
* @param set Pointer to I2S clock devider configuration paramater
*/
static inline void i2s_ll_set_tx_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
static inline void i2s_ll_tx_set_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
{
hw->clkm_conf.clkm_div_num = set->mclk_div;
hw->clkm_conf.clkm_div_b = set->b;
@@ -234,7 +234,7 @@ static inline void i2s_ll_set_tx_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
* @param hw Peripheral I2S hardware instance address.
* @param set Pointer to I2S clock devider configuration paramater
*/
static inline void i2s_ll_set_rx_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
static inline void i2s_ll_rx_set_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
{
hw->clkm_conf.clkm_div_num = set->mclk_div;
hw->clkm_conf.clkm_div_b = set->b;
@@ -247,7 +247,7 @@ static inline void i2s_ll_set_rx_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_enable_tx_intr(i2s_dev_t *hw)
static inline void i2s_ll_tx_enable_intr(i2s_dev_t *hw)
{
hw->int_ena.out_eof = 1;
hw->int_ena.out_dscr_err = 1;
@@ -258,7 +258,7 @@ static inline void i2s_ll_enable_tx_intr(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_disable_tx_intr(i2s_dev_t *hw)
static inline void i2s_ll_tx_disable_intr(i2s_dev_t *hw)
{
hw->int_ena.out_eof = 0;
hw->int_ena.out_dscr_err = 0;
@@ -269,7 +269,7 @@ static inline void i2s_ll_disable_tx_intr(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_enable_rx_intr(i2s_dev_t *hw)
static inline void i2s_ll_rx_enable_intr(i2s_dev_t *hw)
{
hw->int_ena.in_suc_eof = 1;
hw->int_ena.in_dscr_err = 1;
@@ -280,7 +280,7 @@ static inline void i2s_ll_enable_rx_intr(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_disable_rx_intr(i2s_dev_t *hw)
static inline void i2s_ll_rx_disable_intr(i2s_dev_t *hw)
{
hw->int_ena.in_suc_eof = 0;
hw->int_ena.in_dscr_err = 0;
@@ -290,11 +290,12 @@ static inline void i2s_ll_disable_rx_intr(i2s_dev_t *hw)
* @brief Get I2S interrupt status
*
* @param hw Peripheral I2S hardware instance address.
* @param intr_mask Pointer to accept interrupt status
* @return
* - module interrupt status
*/
static inline void i2s_ll_get_intr_status(i2s_dev_t *hw, uint32_t *intr_mask)
static inline uint32_t i2s_ll_get_intr_status(i2s_dev_t *hw)
{
*intr_mask = hw->int_st.val;
return hw->int_st.val;
}
/**
@@ -313,7 +314,7 @@ static inline void i2s_ll_clear_intr_status(i2s_dev_t *hw, uint32_t clr_mask)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_dma_out(i2s_dev_t *hw)
static inline void i2s_ll_tx_reset_dma(i2s_dev_t *hw)
{
hw->lc_conf.out_rst = 1;
hw->lc_conf.out_rst = 0;
@@ -324,18 +325,44 @@ static inline void i2s_ll_reset_dma_out(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_reset_dma_in(i2s_dev_t *hw)
static inline void i2s_ll_rx_reset_dma(i2s_dev_t *hw)
{
hw->lc_conf.in_rst = 1;
hw->lc_conf.in_rst = 0;
}
/**
* @brief Enable TX PDM mode.
* @note ESP32-S2 doesn't support pdm
* This function is used to be compatible with those support pdm
*
* @param hw Peripheral I2S hardware instance address (ignored)
* @param pdm_enable Set true to TX enable PDM mode (ignored)
*/
static inline void i2s_ll_tx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
{
// Remain empty
}
/**
* @brief Enable RX PDM mode.
* @note ESP32-S2 doesn't support pdm
* This function is used to be compatible with those support pdm
*
* @param hw Peripheral I2S hardware instance address (ignored)
* @param pdm_enable Set true to RX enable PDM mode (ignored)
*/
static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
{
// Remain empty
}
/**
* @brief Start TX module
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_start_tx(i2s_dev_t *hw)
static inline void i2s_ll_tx_start(i2s_dev_t *hw)
{
hw->conf.tx_start = 1;
}
@@ -345,7 +372,7 @@ static inline void i2s_ll_start_tx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_start_rx(i2s_dev_t *hw)
static inline void i2s_ll_rx_start(i2s_dev_t *hw)
{
hw->conf.rx_start = 1;
}
@@ -356,7 +383,7 @@ static inline void i2s_ll_start_rx(i2s_dev_t *hw)
* @param hw Peripheral I2S hardware instance address.
* @param link_addr DMA descriptor link address.
*/
static inline void i2s_ll_start_tx_link(i2s_dev_t *hw, uint32_t link_addr)
static inline void i2s_ll_tx_start_link(i2s_dev_t *hw, uint32_t link_addr)
{
hw->out_link.addr = link_addr;
hw->out_link.start = 1;
@@ -368,7 +395,7 @@ static inline void i2s_ll_start_tx_link(i2s_dev_t *hw, uint32_t link_addr)
* @param hw Peripheral I2S hardware instance address.
* @param link_addr DMA descriptor link address.
*/
static inline void i2s_ll_start_rx_link(i2s_dev_t *hw, uint32_t link_addr)
static inline void i2s_ll_rx_start_link(i2s_dev_t *hw, uint32_t link_addr)
{
hw->in_link.addr = link_addr;
hw->in_link.start = 1;
@@ -379,7 +406,7 @@ static inline void i2s_ll_start_rx_link(i2s_dev_t *hw, uint32_t link_addr)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_stop_tx(i2s_dev_t *hw)
static inline void i2s_ll_tx_stop(i2s_dev_t *hw)
{
hw->conf.tx_start = 0;
}
@@ -389,7 +416,7 @@ static inline void i2s_ll_stop_tx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_stop_rx(i2s_dev_t *hw)
static inline void i2s_ll_rx_stop(i2s_dev_t *hw)
{
hw->conf.rx_start = 0;
}
@@ -399,7 +426,7 @@ static inline void i2s_ll_stop_rx(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_stop_out_link(i2s_dev_t *hw)
static inline void i2s_ll_tx_stop_link(i2s_dev_t *hw)
{
hw->out_link.stop = 1;
}
@@ -409,7 +436,7 @@ static inline void i2s_ll_stop_out_link(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_stop_in_link(i2s_dev_t *hw)
static inline void i2s_ll_rx_stop_link(i2s_dev_t *hw)
{
hw->in_link.stop = 1;
}
@@ -420,7 +447,7 @@ static inline void i2s_ll_stop_in_link(i2s_dev_t *hw)
* @param hw Peripheral I2S hardware instance address.
* @param eof_addr Pointer to accept out eof des address
*/
static inline void i2s_ll_get_out_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
static inline void i2s_ll_tx_get_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
{
*eof_addr = hw->out_eof_des_addr;
}
@@ -431,7 +458,7 @@ static inline void i2s_ll_get_out_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr
* @param hw Peripheral I2S hardware instance address.
* @param eof_addr Pointer to accept in eof des address
*/
static inline void i2s_ll_get_in_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
static inline void i2s_ll_rx_get_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
{
*eof_addr = hw->in_eof_des_addr;
}
@@ -442,7 +469,7 @@ static inline void i2s_ll_get_in_eof_des_addr(i2s_dev_t *hw, uint32_t *eof_addr)
* @param hw Peripheral I2S hardware instance address.
* @param eof_num the byte length to trigger in_suc_eof interrupt
*/
static inline void i2s_ll_set_rx_eof_num(i2s_dev_t *hw, uint32_t eof_num)
static inline void i2s_ll_rx_set_eof_num(i2s_dev_t *hw, uint32_t eof_num)
{
hw->rx_eof_num = eof_num;
}
@@ -451,12 +478,12 @@ static inline void i2s_ll_set_rx_eof_num(i2s_dev_t *hw, uint32_t eof_num)
* @brief Congfigure TX chan bit and audio data bit, on ESP32-S2, sample_bit should equals to data_bit
*
* @param hw Peripheral I2S hardware instance address.
* @param sample_bit The chan bit width
* @param chan_bit The chan bit width
* @param data_bit The audio data bit width
*/
static inline void i2s_ll_set_tx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, int data_bit)
static inline void i2s_ll_tx_set_sample_bit(i2s_dev_t *hw, uint8_t chan_bit, int data_bit)
{
hw->fifo_conf.tx_fifo_mod = (sample_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
hw->fifo_conf.tx_fifo_mod = (chan_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
hw->sample_rate_conf.tx_bits_mod = data_bit;
}
@@ -464,12 +491,12 @@ static inline void i2s_ll_set_tx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, i
* @brief Congfigure RX chan bit and audio data bit, on ESP32-S2, sample_bit should equals to data_bit
*
* @param hw Peripheral I2S hardware instance address.
* @param sample_bit The chan bit width
* @param chan_bit The chan bit width
* @param data_bit The audio data bit width
*/
static inline void i2s_ll_set_rx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, int data_bit)
static inline void i2s_ll_rx_set_sample_bit(i2s_dev_t *hw, uint8_t chan_bit, int data_bit)
{
hw->fifo_conf.rx_fifo_mod = (sample_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
hw->fifo_conf.rx_fifo_mod = (chan_bit <= I2S_BITS_PER_SAMPLE_16BIT ? 0 : 2);
hw->sample_rate_conf.rx_bits_mod = data_bit;
}
@@ -479,7 +506,7 @@ static inline void i2s_ll_set_rx_sample_bit(i2s_dev_t *hw, uint8_t sample_bit, i
* @param hw Peripheral I2S hardware instance address.
* @param ena Set true to enable DMA
*/
static inline void i2s_ll_dma_enable(i2s_dev_t *hw, bool ena)
static inline void i2s_ll_enable_dma(i2s_dev_t *hw, bool ena)
{
hw->fifo_conf.dscr_en = ena;
}
@@ -489,7 +516,7 @@ static inline void i2s_ll_dma_enable(i2s_dev_t *hw, bool ena)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_tx_format_philip(i2s_dev_t *hw)
static inline void i2s_ll_tx_set_format_philip(i2s_dev_t *hw)
{
hw->conf.tx_short_sync = 0;
hw->conf.tx_msb_shift = 1;
@@ -500,7 +527,7 @@ static inline void i2s_ll_set_tx_format_philip(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_rx_format_philip(i2s_dev_t *hw)
static inline void i2s_ll_rx_set_format_philip(i2s_dev_t *hw)
{
hw->conf.rx_short_sync = 0;
hw->conf.rx_msb_shift = 1;
@@ -511,7 +538,7 @@ static inline void i2s_ll_set_rx_format_philip(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_tx_format_msb_align(i2s_dev_t *hw)
static inline void i2s_ll_tx_set_format_msb_align(i2s_dev_t *hw)
{
hw->conf.tx_short_sync = 0;
hw->conf.tx_msb_shift = 0;
@@ -522,7 +549,7 @@ static inline void i2s_ll_set_tx_format_msb_align(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_rx_format_msb_align(i2s_dev_t *hw)
static inline void i2s_ll_rx_set_format_msb_align(i2s_dev_t *hw)
{
hw->conf.rx_short_sync = 0;
hw->conf.rx_msb_shift = 0;
@@ -533,7 +560,7 @@ static inline void i2s_ll_set_rx_format_msb_align(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_tx_pcm_short(i2s_dev_t *hw)
static inline void i2s_ll_tx_set_pcm_short(i2s_dev_t *hw)
{
hw->conf.tx_short_sync = 1;
hw->conf.tx_msb_shift = 0;
@@ -544,7 +571,7 @@ static inline void i2s_ll_set_tx_pcm_short(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_rx_pcm_short(i2s_dev_t *hw)
static inline void i2s_ll_rx_set_pcm_short(i2s_dev_t *hw)
{
hw->conf.rx_short_sync = 1;
hw->conf.rx_msb_shift = 0;
@@ -555,7 +582,7 @@ static inline void i2s_ll_set_rx_pcm_short(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_tx_pcm_long(i2s_dev_t *hw)
static inline void i2s_ll_tx_set_pcm_long(i2s_dev_t *hw)
{
hw->conf.tx_short_sync = 0;
hw->conf.tx_msb_shift = 0;
@@ -566,26 +593,66 @@ static inline void i2s_ll_set_tx_pcm_long(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_set_rx_pcm_long(i2s_dev_t *hw)
static inline void i2s_ll_rx_set_pcm_long(i2s_dev_t *hw)
{
hw->conf.rx_short_sync = 0;
hw->conf.rx_msb_shift = 0;
}
/**
* @brief Configure TX WS signal width
*
* @param hw Peripheral I2S hardware instance address.
* @param width WS width in BCK cycle
*/
static inline void i2s_ll_tx_set_ws_width(i2s_dev_t *hw, int width)
{
hw->conf.tx_short_sync = width == 1 ? 1 : 0;
}
/**
* @brief Configure RX WS signal width
*
* @param hw Peripheral I2S hardware instance address.
* @param width WS width in BCK cycle
*/
static inline void i2s_ll_rx_set_ws_width(i2s_dev_t *hw, int width)
{
hw->conf.rx_short_sync = width == 1 ? 1 : 0;
}
/**
* @brief Enable TX MSB shift, the data will be launch at the first BCK clock
*
* @param hw Peripheral I2S hardware instance address.
* @param msb_shift_enable Set true to enable MSB shift
*/
static inline void i2s_ll_tx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enable)
{
hw->conf.tx_msb_shift = msb_shift_enable;
}
/**
* @brief Enable RX MSB shift, the data will be launch at the first BCK clock
*
* @param hw Peripheral I2S hardware instance address.
* @param msb_shift_enable Set true to enable MSB shift
*/
static inline void i2s_ll_rx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enable)
{
hw->conf.rx_msb_shift = msb_shift_enable;
}
/**
* @brief Enable TX mono mode
*
* @param hw Peripheral I2S hardware instance address.
* @param mono_ena Set true to enable mono mde.
*/
static inline void i2s_ll_tx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
static inline void i2s_ll_tx_enable_mono_mode(i2s_dev_t *hw, bool mono_ena)
{
int data_bit = hw->sample_rate_conf.tx_bits_mod;
if (data_bit <= I2S_BITS_PER_SAMPLE_16BIT) {
hw->fifo_conf.tx_fifo_mod = 0 + mono_ena;
} else {
hw->fifo_conf.tx_fifo_mod = 2 + mono_ena;
}
hw->fifo_conf.tx_fifo_mod = data_bit <= I2S_BITS_PER_SAMPLE_16BIT ? mono_ena : 2 + mono_ena;
hw->conf.tx_dma_equal = mono_ena;
hw->conf_chan.tx_chan_mod = mono_ena;
}
@@ -596,14 +663,10 @@ static inline void i2s_ll_tx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
* @param hw Peripheral I2S hardware instance address.
* @param mono_ena Set true to enable mono mde.
*/
static inline void i2s_ll_rx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
static inline void i2s_ll_rx_enable_mono_mode(i2s_dev_t *hw, bool mono_ena)
{
int data_bit = hw->sample_rate_conf.rx_bits_mod;
if (data_bit <= I2S_BITS_PER_SAMPLE_16BIT) {
hw->fifo_conf.rx_fifo_mod = 0 + mono_ena;
} else {
hw->fifo_conf.rx_fifo_mod = 2 + mono_ena;
}
hw->fifo_conf.rx_fifo_mod = data_bit <= I2S_BITS_PER_SAMPLE_16BIT ? mono_ena : 2 + mono_ena;
hw->conf.rx_dma_equal = mono_ena;
hw->conf_chan.rx_chan_mod = mono_ena;
}
@@ -614,7 +677,7 @@ static inline void i2s_ll_rx_mono_mode_ena(i2s_dev_t *hw, bool mono_ena)
* @param hw Peripheral I2S hardware instance address.
* @param loopback_en Set true to enable loopback mode.
*/
static inline void i2s_ll_loop_back_ena(i2s_dev_t *hw, bool loopback_en)
static inline void i2s_ll_enable_loop_back(i2s_dev_t *hw, bool loopback_en)
{
hw->conf.sig_loopback = loopback_en;
}