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driver/i2s: refactor ll and hal
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@@ -111,12 +111,8 @@
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#define SOC_I2S_NUM (1)
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#define SOC_I2S_SUPPORTS_PCM (1)
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#define SOC_I2S_SUPPORTS_PDM_TX (1)
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#define SOC_I2S_SUPPORTS_PDM_RX (0)
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#define SOC_I2S_SUPPORTS_PDM_CODEC (1)
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#define SOC_I2S_SUPPORTS_TDM (1)
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#define SOC_I2S_APLL_MIN_FREQ (250000000)
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#define SOC_I2S_APLL_MAX_FREQ (500000000)
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#define SOC_I2S_APLL_MIN_RATE (10675) //in Hz, I2S Clock rate limited by hardware
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#define SOC_I2S_MAX_BUFFER_SIZE (4 * 1024 * 1024) //the maximum RAM can be allocated
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/*-------------------------- LEDC CAPS ---------------------------------------*/
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#define SOC_LEDC_SUPPORT_XTAL_CLOCK (1)
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