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Merge branch 'bugfix/renable_unit_tests' into 'master'

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ci: enable previously disabled unit tests

See merge request espressif/esp-idf!12582
This commit is contained in:
Angus Gratton
2021-04-01 03:23:22 +00:00
parent 0f115609b1 3fea0727b0
commit 3c9e9a7704
11 changed files with 60 additions and 37 deletions
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7
components/driver/test/test_spi_master.c
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@@ -1050,7 +1050,6 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]")
#endif //#if !DISABLED_FOR_TARGETS(ESP32C3)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
/********************************************************************************
* Test SPI transaction interval
********************************************************************************/
@@ -1058,8 +1057,8 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]")
#ifndef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
#define RECORD_TIME_PREPARE() uint32_t __t1, __t2
#define RECORD_TIME_START() do {__t1 = xthal_get_ccount();}while(0)
#define RECORD_TIME_END(p_time) do{__t2 = xthal_get_ccount(); *p_time = (__t2-__t1);}while(0)
#define RECORD_TIME_START() do {__t1 = esp_cpu_get_ccount();}while(0)
#define RECORD_TIME_END(p_time) do{__t2 = esp_cpu_get_ccount(); *p_time = (__t2-__t1);}while(0)
#ifdef CONFIG_IDF_TARGET_ESP32
#define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ)
#elif CONFIG_IDF_TARGET_ESP32S2
@@ -1203,5 +1202,3 @@ TEST_CASE("spi_speed","[spi]")
master_free_device_bus(spi);
}
#endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)

5
components/driver/test/test_spi_sio.c
View File

@@ -24,7 +24,8 @@
#include "hal/spi_ll.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
#if !DISABLED_FOR_TARGETS(ESP32C3) //There is only one GPSPI controller, so single-board test is disabled.
/********************************************************************************
* Test SIO
@@ -101,6 +102,8 @@ TEST_CASE("local test sio", "[spi]")
spi_slave_free(TEST_SLAVE_HOST);
master_free_device_bus(spi);
}
#endif //!DISABLED_FOR_TARGETS(ESP32C3) //There is only one GPSPI controller, so single-board test is disabled.
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
//These tests are ESP32 only due to lack of runners