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feat(uart): move periph_ll_uart_enabled to uart_ll.h

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gaoxu
2023-09-15 11:09:52 +08:00
parent 4541ad134d
commit 3e3e928209
19 changed files with 217 additions and 104 deletions
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21
components/hal/esp32c3/include/hal/uart_ll.h
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@@ -11,11 +11,14 @@
#pragma once
#include <stdlib.h>
#include "hal/assert.h"
#include "hal/misc.h"
#include "hal/uart_types.h"
#include "soc/uart_reg.h"
#include "soc/uart_struct.h"
#include "soc/system_struct.h"
#include "soc/system_reg.h"
#include "soc/dport_access.h"
#include "esp_attr.h"
#ifdef __cplusplus
@@ -57,6 +60,24 @@ typedef enum {
UART_INTR_WAKEUP = (0x1 << 19),
} uart_intr_t;
/**
* @brief Check if UART is enabled or disabled.
*
* @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
*
* @return true: enabled; false: disabled
*/
FORCE_INLINE_ATTR bool uart_ll_is_enabled(uint32_t uart_num)
{
HAL_ASSERT(uart_num < SOC_UART_HP_NUM);
uint32_t uart_rst_bit = ((uart_num == 0) ? SYSTEM_UART_RST :
(uart_num == 1) ? SYSTEM_UART1_RST : 0);
uint32_t uart_en_bit = ((uart_num == 0) ? SYSTEM_UART_CLK_EN :
(uart_num == 1) ? SYSTEM_UART1_CLK_EN : 0);
return DPORT_REG_GET_BIT(SYSTEM_PERIP_RST_EN0_REG, uart_rst_bit) == 0 &&
DPORT_REG_GET_BIT(SYSTEM_PERIP_CLK_EN0_REG, uart_en_bit) != 0;
}
/**
* @brief Configure the UART core reset.
*