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refactor(gptimer): sleep retention code clean up
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morris
228
components/esp_driver_gptimer/src/gptimer_common.c
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228
components/esp_driver_gptimer/src/gptimer_common.c
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_check.h"
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#include "esp_clk_tree.h"
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#include "esp_private/gptimer.h"
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#include "gptimer_priv.h"
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static const char *TAG = "gptimer";
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typedef struct gptimer_platform_t {
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_lock_t mutex; // platform level mutex lock
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gptimer_group_t *groups[SOC_TIMER_GROUPS]; // timer group pool
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int group_ref_counts[SOC_TIMER_GROUPS]; // reference count used to protect group install/uninstall
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} gptimer_platform_t;
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// gptimer driver platform, it's always a singleton
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static gptimer_platform_t s_platform;
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#if GPTIMER_USE_RETENTION_LINK
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static esp_err_t gptimer_create_sleep_retention_link_cb(void *arg)
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{
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gptimer_group_t *group = (gptimer_group_t *)arg;
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int group_id = group->group_id;
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sleep_retention_module_t module = group->sleep_retention_module;
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esp_err_t err = sleep_retention_entries_create(tg_timer_reg_retention_info[group_id].regdma_entry_array,
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tg_timer_reg_retention_info[group_id].array_size,
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REGDMA_LINK_PRI_GPTIMER, module);
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ESP_RETURN_ON_ERROR(err, TAG, "create retention link failed");
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return ESP_OK;
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}
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void gptimer_create_retention_module(gptimer_group_t *group)
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{
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sleep_retention_module_t module = group->sleep_retention_module;
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_lock_acquire(&s_platform.mutex);
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if (group->retention_link_created == false) {
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if (sleep_retention_module_allocate(module) != ESP_OK) {
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// even though the sleep retention module create failed, GPTimer driver should still work, so just warning here
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ESP_LOGW(TAG, "create retention module for group %d retention, power domain can't turn off", group->group_id);
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} else {
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group->retention_link_created = true;
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}
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}
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_lock_release(&s_platform.mutex);
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}
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#endif // GPTIMER_USE_RETENTION_LINK
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gptimer_group_t *gptimer_acquire_group_handle(int group_id)
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{
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bool new_group = false;
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gptimer_group_t *group = NULL;
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// prevent install timer group concurrently
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_lock_acquire(&s_platform.mutex);
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if (!s_platform.groups[group_id]) {
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group = heap_caps_calloc(1, sizeof(gptimer_group_t), GPTIMER_MEM_ALLOC_CAPS);
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if (group) {
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new_group = true;
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s_platform.groups[group_id] = group;
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// initialize timer group members
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group->group_id = group_id;
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group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
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}
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} else {
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group = s_platform.groups[group_id];
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}
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if (group) {
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// someone acquired the group handle means we have a new object that refer to this group
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s_platform.group_ref_counts[group_id]++;
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}
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_lock_release(&s_platform.mutex);
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if (new_group) {
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// !!! HARDWARE SHARED RESOURCE !!!
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// the gptimer and watchdog reside in the same the timer group
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// we need to increase/decrease the reference count before enable/disable/reset the peripheral
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PERIPH_RCC_ACQUIRE_ATOMIC(timer_group_periph_signals.groups[group_id].module, ref_count) {
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if (ref_count == 0) {
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timer_ll_enable_bus_clock(group_id, true);
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timer_ll_reset_register(group_id);
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}
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}
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#if GPTIMER_USE_RETENTION_LINK
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sleep_retention_module_t module = TIMER_LL_SLEEP_RETENTION_MODULE_ID(group_id);
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sleep_retention_module_init_param_t init_param = {
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.cbs = {
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.create = {
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.handle = gptimer_create_sleep_retention_link_cb,
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.arg = group
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},
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},
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.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
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};
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if (sleep_retention_module_init(module, &init_param) == ESP_OK) {
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group->sleep_retention_module = module;
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} else {
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// even though the sleep retention module init failed, RMT driver should still work, so just warning here
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ESP_LOGW(TAG, "init sleep retention failed %d, power domain may be turned off during sleep", group_id);
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}
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#endif // GPTIMER_USE_RETENTION_LINK
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ESP_LOGD(TAG, "new group (%d) @%p", group_id, group);
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}
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return group;
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}
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void gptimer_release_group_handle(gptimer_group_t *group)
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{
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int group_id = group->group_id;
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bool do_deinitialize = false;
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_lock_acquire(&s_platform.mutex);
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s_platform.group_ref_counts[group_id]--;
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if (s_platform.group_ref_counts[group_id] == 0) {
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assert(s_platform.groups[group_id]);
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do_deinitialize = true;
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s_platform.groups[group_id] = NULL;
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}
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_lock_release(&s_platform.mutex);
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if (do_deinitialize) {
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// disable bus clock for the timer group
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PERIPH_RCC_RELEASE_ATOMIC(timer_group_periph_signals.groups[group_id].module, ref_count) {
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if (ref_count == 0) {
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timer_ll_enable_bus_clock(group_id, false);
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}
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}
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#if GPTIMER_USE_RETENTION_LINK
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if (group->sleep_retention_module) {
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if (group->retention_link_created) {
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sleep_retention_module_free(group->sleep_retention_module);
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}
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sleep_retention_module_deinit(group->sleep_retention_module);
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}
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#endif
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free(group);
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ESP_LOGD(TAG, "del group (%d)", group_id);
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}
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}
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esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t src_clk, uint32_t resolution_hz)
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{
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uint32_t counter_src_hz = 0;
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int timer_id = timer->timer_id;
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// TODO: [clk_tree] to use a generic clock enable/disable or acquire/release function for all clock source
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#if SOC_TIMER_GROUP_SUPPORT_RC_FAST
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if (src_clk == GPTIMER_CLK_SRC_RC_FAST) {
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// RC_FAST clock is not enabled automatically on start up, we enable it here manually.
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// Note there's a ref count in the enable/disable function, we must call them in pair in the driver.
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periph_rtc_dig_clk8m_enable();
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}
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#endif // SOC_TIMER_GROUP_SUPPORT_RC_FAST
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// get clock source frequency
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ESP_RETURN_ON_ERROR(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)src_clk, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &counter_src_hz),
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TAG, "get clock source frequency failed");
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#if CONFIG_PM_ENABLE
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bool need_pm_lock = true;
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// to make the gptimer work reliable, the source clock must stay alive and unchanged
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// driver will create different pm lock for that purpose, according to different clock source
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esp_pm_lock_type_t pm_lock_type = ESP_PM_NO_LIGHT_SLEEP;
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#if SOC_TIMER_GROUP_SUPPORT_RC_FAST
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if (src_clk == GPTIMER_CLK_SRC_RC_FAST) {
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// RC_FAST won't be turn off in sleep and won't change its frequency during DFS
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need_pm_lock = false;
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}
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#endif // SOC_TIMER_GROUP_SUPPORT_RC_FAST
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#if SOC_TIMER_GROUP_SUPPORT_APB
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if (src_clk == GPTIMER_CLK_SRC_APB) {
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// APB clock frequency can be changed during DFS
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pm_lock_type = ESP_PM_APB_FREQ_MAX;
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}
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#endif // SOC_TIMER_GROUP_SUPPORT_APB
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#if CONFIG_IDF_TARGET_ESP32C2
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if (src_clk == GPTIMER_CLK_SRC_PLL_F40M) {
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// although PLL_F40M clock is a fixed PLL clock, which is unchangeable
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// on ESP32C2, PLL_F40M can be turned off even during DFS (unlike other PLL clocks)
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// so we're acquiring a fake "APB" lock here to prevent the system from doing DFS
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pm_lock_type = ESP_PM_APB_FREQ_MAX;
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}
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#endif // CONFIG_IDF_TARGET_ESP32C2
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if (need_pm_lock) {
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sprintf(timer->pm_lock_name, "gptimer_%d_%d", timer->group->group_id, timer_id); // e.g. gptimer_0_0
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ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_lock_type, 0, timer->pm_lock_name, &timer->pm_lock),
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TAG, "create pm lock failed");
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}
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#endif // CONFIG_PM_ENABLE
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// !!! HARDWARE SHARED RESOURCE !!!
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// on some ESP chip, different peripheral's clock source setting are mixed in the same register
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// so we need to make this done in an atomic way
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GPTIMER_CLOCK_SRC_ATOMIC() {
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timer_ll_set_clock_source(timer->hal.dev, timer_id, src_clk);
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timer_ll_enable_clock(timer->hal.dev, timer_id, true);
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}
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timer->clk_src = src_clk;
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uint32_t prescale = counter_src_hz / resolution_hz; // potential resolution loss here
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timer_ll_set_clock_prescale(timer->hal.dev, timer_id, prescale);
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timer->resolution_hz = counter_src_hz / prescale; // this is the real resolution
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if (timer->resolution_hz != resolution_hz) {
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ESP_LOGW(TAG, "resolution lost, expect %"PRIu32", real %"PRIu32, resolution_hz, timer->resolution_hz);
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}
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return ESP_OK;
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}
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esp_err_t gptimer_get_intr_handle(gptimer_handle_t timer, intr_handle_t *ret_intr_handle)
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{
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ESP_RETURN_ON_FALSE(timer && ret_intr_handle, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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*ret_intr_handle = timer->intr;
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return ESP_OK;
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}
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esp_err_t gptimer_get_pm_lock(gptimer_handle_t timer, esp_pm_lock_handle_t *ret_pm_lock)
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{
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ESP_RETURN_ON_FALSE(timer && ret_pm_lock, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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*ret_pm_lock = timer->pm_lock;
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return ESP_OK;
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}
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