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synced 2025-08-23 09:20:30 +00:00
refactor(i2c): rename some LL functions according to TRM descriptions
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@@ -280,7 +280,7 @@ static inline void i2c_ll_get_intr_mask(i2c_dev_t *hw, uint32_t *intr_status)
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*
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* @return None
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*/
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static inline void i2c_ll_slave_set_fifo_mode(i2c_dev_t *hw, bool fifo_mode_en)
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static inline void i2c_ll_enable_fifo_mode(i2c_dev_t *hw, bool fifo_mode_en)
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{
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hw->fifo_conf.nonfifo_en = fifo_mode_en ? 0 : 1;
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}
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@@ -299,7 +299,7 @@ static inline void i2c_ll_set_tout(i2c_dev_t *hw, int tout)
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}
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/**
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* @brief Configure I2C slave broadcasting mode.
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* @brief Enable the I2C slave to respond to broadcast address
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*
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* @param hw Beginning address of the peripheral registers
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* @param broadcast_en Set true to enable broadcast, else, set it false
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@@ -509,7 +509,7 @@ static inline void i2c_ll_get_tout(i2c_dev_t *hw, int *timeout)
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_trans_start(i2c_dev_t *hw)
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static inline void i2c_ll_start_trans(i2c_dev_t *hw)
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{
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hw->ctr.trans_start = 1;
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}
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@@ -708,7 +708,6 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw)
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ctrl_reg.sda_force_out = 1;
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ctrl_reg.scl_force_out = 1;
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hw->ctr.val = ctrl_reg.val;
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hw->fifo_conf.fifo_addr_cfg_en = 0;
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}
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/**
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@@ -770,12 +769,12 @@ static inline void i2c_ll_reset_register(int i2c_port)
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#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0)
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/**
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* @brief Set whether slave should auto start, or only start with start signal from master
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* @brief Enable I2C slave to automatically send data when addressed by the master
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*
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* @param hw Beginning address of the peripheral registers
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* @param slv_ex_auto_en 1 if slave auto start data transaction, otherwise, 0.
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*/
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static inline void i2c_ll_slave_tx_auto_start_en(i2c_dev_t *hw, bool slv_ex_auto_en)
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static inline void i2c_ll_slave_enable_auto_start(i2c_dev_t *hw, bool slv_ex_auto_en)
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{
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;// ESP32 do not support
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}
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