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fix(i2s): lock APB when using apll with DFS feature
Closes https://github.com/espressif/esp-idf/issues/14707
Append to the commit ad9021a844
.
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@@ -254,6 +254,13 @@ esp_err_t i2s_channel_init_tdm_mode(i2s_chan_handle_t handle, const i2s_tdm_conf
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#endif
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#ifdef CONFIG_PM_ENABLE
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esp_pm_lock_type_t pm_type = ESP_PM_APB_FREQ_MAX;
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#if SOC_I2S_SUPPORTS_APLL && SOC_I2S_HW_VERSION_2
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if (tdm_cfg->clk_cfg.clk_src == I2S_CLK_SRC_APLL) {
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/* Only I2S HW 2 supports to adjust APB frequency while using APLL clock source
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* HW 1 will have timing issue because the DMA and I2S are under different clock domains */
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pm_type = ESP_PM_NO_LIGHT_SLEEP;
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}
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#endif // SOC_I2S_SUPPORTS_APLL
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ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_type, 0, "i2s_driver", &handle->pm_lock), TAG, "I2S pm lock create failed");
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#endif
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@@ -302,8 +309,10 @@ esp_err_t i2s_channel_reconfig_tdm_clock(i2s_chan_handle_t handle, const i2s_tdm
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if (tdm_cfg->clk_cfg.clk_src != clk_cfg->clk_src) {
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ESP_GOTO_ON_ERROR(esp_pm_lock_delete(handle->pm_lock), err, TAG, "I2S delete old pm lock failed");
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esp_pm_lock_type_t pm_type = ESP_PM_APB_FREQ_MAX;
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#if SOC_I2S_SUPPORTS_APLL
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#if SOC_I2S_SUPPORTS_APLL && SOC_I2S_HW_VERSION_2
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if (clk_cfg->clk_src == I2S_CLK_SRC_APLL) {
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/* Only I2S HW 2 supports to adjust APB frequency while using APLL clock source
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* HW 1 will have timing issue because the DMA and I2S are under different clock domains */
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pm_type = ESP_PM_NO_LIGHT_SLEEP;
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}
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#endif // SOC_I2S_SUPPORTS_APLL
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