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Merge branch 'feat/usb_ls_p4_backport_v5.3' into 'release/v5.3'

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Fix USB Low-Speed devices on ESP32-P4 backport v5.3

See merge request espressif/esp-idf!33268
This commit is contained in:
morris
2024-09-05 10:41:16 +08:00
parent 26b2e3db8a 8e27a0fb25
commit 412f1f5991
4 changed files with 145 additions and 25 deletions
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33
components/hal/esp32p4/include/hal/usb_utmi_ll.h
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@@ -10,18 +10,34 @@
#include "esp_attr.h"
#include "soc/lp_clkrst_struct.h"
#include "soc/hp_sys_clkrst_struct.h"
#include "soc/hp_system_struct.h"
#include "soc/usb_utmi_struct.h"
#ifdef __cplusplus
extern "C" {
#endif
/* ---------------------------- USB PHY Control ---------------------------- */
/**
* @brief Configure Low-Speed mode
*
* @param[in] hw Beginning address of the peripheral registers
* @param[in] parallel Parallel or serial LS mode
* @return FORCE_INLINE_ATTR
*/
FORCE_INLINE_ATTR void usb_utmi_ll_configure_ls(usb_utmi_dev_t *hw, bool parallel)
{
hw->fc_06.ls_par_en = parallel;
hw->fc_06.ls_kpalv_en = 1;
}
/* ----------------------------- RCC Functions ----------------------------- */
/**
* @brief Enable the bus clock for the USB UTMI PHY and USB_DWC_HS controller
*
* @param clk_en True to enable, false to disable
* @param[in] clk_en True to enable, false to disable
*/
FORCE_INLINE_ATTR void usb_utmi_ll_enable_bus_clock(bool clk_en)
{
@@ -41,12 +57,25 @@ FORCE_INLINE_ATTR void usb_utmi_ll_reset_register(void)
{
// Reset the USB_UTMI and USB_DWC_HS
LP_AON_CLKRST.hp_usb_clkrst_ctrl1.rst_en_usb_otg20 = 1;
LP_AON_CLKRST.hp_usb_clkrst_ctrl1.rst_en_usb_otg20_phy = 1;
LP_AON_CLKRST.hp_usb_clkrst_ctrl1.rst_en_usb_otg20_phy = 0;
LP_AON_CLKRST.hp_usb_clkrst_ctrl1.rst_en_usb_otg20 = 0;
}
// P_AON_CLKRST.hp_usb_clkrst_ctrlx are shared registers, so this function must be used in an atomic way
// P_AON_CLKRST.hp_usb_clkrst_ctrlx is shared register, so this function must be used in an atomic way
#define usb_utmi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; usb_utmi_ll_reset_register(__VA_ARGS__)
/**
* @brief Enable precise detection of VBUS
*
* @param[in] enable Enable/Disable precise detection
*/
FORCE_INLINE_ATTR void usb_utmi_ll_enable_precise_detection(bool enable)
{
// Enable VBUS precise detection
HP_SYSTEM.sys_usbotg20_ctrl.sys_otg_suspendm = enable;
}
#ifdef __cplusplus
}
#endif

9
components/hal/esp32p4/include/hal/usb_wrap_ll.h
View File

@@ -12,7 +12,6 @@
#include "soc/lp_system_struct.h"
#include "soc/lp_clkrst_struct.h"
#include "soc/hp_sys_clkrst_struct.h"
#include "soc/hp_system_struct.h" // For HP_SYSTEM domain
#include "soc/usb_wrap_struct.h"
#include "hal/usb_wrap_types.h"
@@ -263,14 +262,6 @@ FORCE_INLINE_ATTR void usb_wrap_ll_reset_register(void)
// P_AON_CLKRST.hp_usb_clkrst_ctrlx are shared registers, so this function must be used in an atomic way
#define usb_wrap_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; usb_wrap_ll_reset_register(__VA_ARGS__)
/* ------------------------------- HP System ------------------------------- */
FORCE_INLINE_ATTR void usb_wrap_ll_enable_precise_detection(void)
{
// Enable VBUS precise detection
HP_SYSTEM.sys_usbotg20_ctrl.sys_otg_suspendm = 1;
}
#ifdef __cplusplus
}
#endif