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Updates for riscv support

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* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
This commit is contained in:
Angus Gratton
2020-11-06 15:00:07 +11:00
parent 87e13baaf1
commit 420aef1ffe
75 changed files with 498 additions and 183 deletions
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2
components/spiffs/esp_spiffs.c
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@@ -275,7 +275,7 @@ esp_err_t esp_spiffs_info(const char* partition_label, size_t *total_bytes, size
if (esp_spiffs_by_label(partition_label, &index) != ESP_OK) {
return ESP_ERR_INVALID_STATE;
}
SPIFFS_info(_efs[index]->fs, total_bytes, used_bytes);
SPIFFS_info(_efs[index]->fs, (uint32_t *)total_bytes, (uint32_t *)used_bytes);
return ESP_OK;
}