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feat(efuse): Adds efuse ADC calib data for ESP32-C5

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This commit is contained in:
Konstantin Kondrashov
2024-09-30 18:52:53 +03:00
parent b4ebb04184
commit 427e8e5fe4
5 changed files with 897 additions and 192 deletions
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46
components/efuse/esp32c5/esp_efuse_table.csv
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@@ -9,7 +9,7 @@
# this will generate new source files, next rebuild all the sources.
# !!!!!!!!!!! #
# This file was generated by regtools.py based on the efuses.yaml file with the version: b09fa417de505238a601eddce188b696
# This file was generated by regtools.py based on the efuses.yaml file with the version: 287a0ed4951aba84b9571a5f31000275
WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses
WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS
@@ -79,8 +79,30 @@ WR_DIS.PA_TRIM_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis
WR_DIS.TRIM_N_BIAS, EFUSE_BLK0, 20, 1, [] wr_dis of TRIM_N_BIAS
WR_DIS.TRIM_P_BIAS, EFUSE_BLK0, 20, 1, [] wr_dis of TRIM_P_BIAS
WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2
WR_DIS.ACTIVE_HP_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of ACTIVE_HP_DBIAS
WR_DIS.ACTIVE_LP_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of ACTIVE_LP_DBIAS
WR_DIS.LSLP_HP_DBG, EFUSE_BLK0, 20, 1, [] wr_dis of LSLP_HP_DBG
WR_DIS.LSLP_HP_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of LSLP_HP_DBIAS
WR_DIS.DSLP_LP_DBG, EFUSE_BLK0, 20, 1, [] wr_dis of DSLP_LP_DBG
WR_DIS.DSLP_LP_DBIAS, EFUSE_BLK0, 20, 1, [] wr_dis of DSLP_LP_DBIAS
WR_DIS.LP_HP_DBIAS_VOL_GAP, EFUSE_BLK0, 20, 1, [] wr_dis of LP_HP_DBIAS_VOL_GAP
WR_DIS.OPTIONAL_UNIQUE_ID, EFUSE_BLK0, 21, 1, [] wr_dis of OPTIONAL_UNIQUE_ID
WR_DIS.TEMPERATURE_SENSOR, EFUSE_BLK0, 21, 1, [] wr_dis of TEMPERATURE_SENSOR
WR_DIS.OCODE, EFUSE_BLK0, 21, 1, [] wr_dis of OCODE
WR_DIS.ADC1_AVE_INITCODE_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN0
WR_DIS.ADC1_AVE_INITCODE_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN1
WR_DIS.ADC1_AVE_INITCODE_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN2
WR_DIS.ADC1_AVE_INITCODE_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_AVE_INITCODE_ATTEN3
WR_DIS.ADC1_HI_DOUT_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN0
WR_DIS.ADC1_HI_DOUT_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN1
WR_DIS.ADC1_HI_DOUT_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN2
WR_DIS.ADC1_HI_DOUT_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_HI_DOUT_ATTEN3
WR_DIS.ADC1_CH0_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH0_ATTEN0_INITCODE_DIFF
WR_DIS.ADC1_CH1_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH1_ATTEN0_INITCODE_DIFF
WR_DIS.ADC1_CH2_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH2_ATTEN0_INITCODE_DIFF
WR_DIS.ADC1_CH3_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH3_ATTEN0_INITCODE_DIFF
WR_DIS.ADC1_CH4_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH4_ATTEN0_INITCODE_DIFF
WR_DIS.ADC1_CH5_ATTEN0_INITCODE_DIFF, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CH5_ATTEN0_INITCODE_DIFF
WR_DIS.BLOCK_USR_DATA, EFUSE_BLK0, 22, 1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 22, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 23, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
@@ -173,8 +195,30 @@ PKG_VERSION, EFUSE_BLK1, 90, 3, [] Packag
PA_TRIM_VERSION, EFUSE_BLK1, 93, 3, [] PADC CAL PA trim version
TRIM_N_BIAS, EFUSE_BLK1, 96, 5, [] PADC CAL N bias
TRIM_P_BIAS, EFUSE_BLK1, 101, 5, [] PADC CAL P bias
ACTIVE_HP_DBIAS, EFUSE_BLK1, 106, 4, [] Active HP DBIAS of fixed voltage
ACTIVE_LP_DBIAS, EFUSE_BLK1, 110, 4, [] Active LP DBIAS of fixed voltage
LSLP_HP_DBG, EFUSE_BLK1, 114, 2, [] LSLP HP DBG of fixed voltage
LSLP_HP_DBIAS, EFUSE_BLK1, 116, 4, [] LSLP HP DBIAS of fixed voltage
DSLP_LP_DBG, EFUSE_BLK1, 120, 4, [] DSLP LP DBG of fixed voltage
DSLP_LP_DBIAS, EFUSE_BLK1, 124, 5, [] DSLP LP DBIAS of fixed voltage
LP_HP_DBIAS_VOL_GAP, EFUSE_BLK1, 129, 5, [] DBIAS gap between LP and HP
OPTIONAL_UNIQUE_ID, EFUSE_BLK2, 0, 128, [] Optional unique 128-bit ID
TEMPERATURE_SENSOR, EFUSE_BLK2, 128, 9, [] Temperature calibration data
OCODE, EFUSE_BLK2, 137, 8, [] ADC OCode
ADC1_AVE_INITCODE_ATTEN0, EFUSE_BLK2, 145, 10, [] Average initcode of ADC1 atten0
ADC1_AVE_INITCODE_ATTEN1, EFUSE_BLK2, 155, 10, [] Average initcode of ADC1 atten0
ADC1_AVE_INITCODE_ATTEN2, EFUSE_BLK2, 165, 10, [] Average initcode of ADC1 atten0
ADC1_AVE_INITCODE_ATTEN3, EFUSE_BLK2, 175, 10, [] Average initcode of ADC1 atten0
ADC1_HI_DOUT_ATTEN0, EFUSE_BLK2, 185, 10, [] HI DOUT of ADC1 atten0
ADC1_HI_DOUT_ATTEN1, EFUSE_BLK2, 195, 10, [] HI DOUT of ADC1 atten1
ADC1_HI_DOUT_ATTEN2, EFUSE_BLK2, 205, 10, [] HI DOUT of ADC1 atten2
ADC1_HI_DOUT_ATTEN3, EFUSE_BLK2, 215, 10, [] HI DOUT of ADC1 atten3
ADC1_CH0_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 225, 4, [] Gap between ADC1 CH0 and average initcode
ADC1_CH1_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 229, 4, [] Gap between ADC1 CH1 and average initcode
ADC1_CH2_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 233, 4, [] Gap between ADC1 CH2 and average initcode
ADC1_CH3_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 237, 4, [] Gap between ADC1 CH3 and average initcode
ADC1_CH4_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 241, 4, [] Gap between ADC1 CH4 and average initcode
ADC1_CH5_ATTEN0_INITCODE_DIFF, EFUSE_BLK2, 245, 4, [] Gap between ADC1 CH5 and average initcode
USER_DATA, EFUSE_BLK3, 0, 256, [BLOCK_USR_DATA] User data
USER_DATA.MAC_CUSTOM, EFUSE_BLK3, 200, 48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC
KEY0, EFUSE_BLK4, 0, 256, [BLOCK_KEY0] Key0 or user data
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