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refractor WiFi clock setting

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Do not set WiFi clock in PHY initializing function, move it to WiFi
   start/stop function.
This commit is contained in:
XiaXiaotian
2017-10-28 10:19:49 +08:00
committed by wangmengyang
parent bd6394db92
commit 42cefc173f
6 changed files with 22 additions and 9 deletions
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4
components/esp32/clk.c
View File

@@ -29,6 +29,7 @@
#include "soc/rtc_cntl_reg.h"
#include "soc/dport_reg.h"
#include "soc/i2s_reg.h"
#include "driver/periph_ctrl.h"
#include "xtensa/core-macros.h"
/* Number of cycles to wait from the 32k XTAL oscillator to consider it running.
@@ -236,4 +237,7 @@ void esp_perip_clk_init(void)
/* Disable WiFi/BT/SDIO clocks. */
DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, wifi_bt_sdio_clk);
/* Enable RNG clock. */
periph_module_enable(PERIPH_RNG_MODULE);
}

2
components/esp32/lib

Submodule components/esp32/lib updated: 4d59fe9623...f5733f50ce

4
components/esp32/phy_init.c
View File

@@ -51,7 +51,7 @@ esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data,
_lock_acquire(&s_phy_rf_init_lock);
if (s_phy_rf_init_count == 0) {
// Enable WiFi peripheral clock
// Enable WiFi/BT common peripheral clock
periph_module_enable(PERIPH_WIFI_BT_COMMON_MODULE);
ESP_LOGV(TAG, "register_chipv7_phy, init_data=%p, cal_data=%p, mode=%d",
init_data, calibration_data, mode);
@@ -76,7 +76,7 @@ esp_err_t esp_phy_rf_deinit(void)
if (s_phy_rf_init_count == 1) {
// Disable PHY and RF.
phy_close_rf();
// Disable WiFi peripheral clock. Do not disable clock for hardware RNG
// Disable WiFi/BT common peripheral clock. Do not disable clock for hardware RNG
periph_module_disable(PERIPH_WIFI_BT_COMMON_MODULE);
} else {
#if CONFIG_SW_COEXIST_ENABLE