fix(driver_spi): make slave_hd isr can place in flash to save iram

components/esp_driver_spi/test_apps/master/main/test_spi_master.c

@@ -121,7 +121,7 @@ TEST_CASE("SPI Master clockdiv calculation routines", "[spi]")
 
 // Test All clock source
 #define TEST_CLK_BYTE_LEN           10000
-#define TEST_TRANS_TIME_BIAS_RATIO  (float)2.0/100   // think 2% transfer time bias as acceptable
+#define TEST_TRANS_TIME_BIAS_RATIO  (float)5.0/100   // think 5% transfer time bias as acceptable
 TEST_CASE("SPI Master clk_source and divider accuracy", "[spi]")
 {
     int64_t start = 0, end = 0;
@@ -1380,8 +1380,8 @@ TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test",
 /********************************************************************************
  *      Test SPI transaction interval
  ********************************************************************************/
-//Disabled since the check in portENTER_CRITICAL in esp_intr_enable/disable increase the delay
-#ifndef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
+//Disabled since place code in flash increase the delay
+#if CONFIG_SPI_MASTER_ISR_IN_IRAM
 
 #define RECORD_TIME_PREPARE() uint32_t __t1, __t2
 #define RECORD_TIME_START()   do {__t1 = esp_cpu_get_cycle_count();}while(0)

components/esp_driver_spi/test_apps/master/pytest_spi_master.py

@@ -10,7 +10,6 @@ from pytest_embedded_idf.utils import idf_parametrize
     'config',
     [
         'release',
-        'freertos_compliance',
         'freertos_flash',
     ],
     indirect=True,
@@ -47,18 +46,8 @@ def test_master_esp_flash(case_tester) -> None:  # type: ignore
 @pytest.mark.parametrize(
     'count, config',
     [
-        (
-            2,
-            'release',
-        ),
-        (
-            2,
-            'freertos_compliance',
-        ),
-        (
-            2,
-            'freertos_flash',
-        ),
+        (2, 'release'),
+        (2, 'freertos_flash'),
         (2, 'iram_safe'),
     ],
     indirect=True,

components/esp_driver_spi/test_apps/master/sdkconfig.ci.freertos_compliance

@@ -1,3 +0,0 @@
-CONFIG_PM_ENABLE=y
-CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
-CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE=y

components/esp_driver_spi/test_apps/master/sdkconfig.ci.freertos_flash

@@ -1 +1,3 @@
 CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
+CONFIG_SPI_MASTER_ISR_IN_IRAM=n
+CONFIG_SPI_SLAVE_ISR_IN_IRAM=n