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https://github.com/espressif/esp-idf.git
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spi_flash: refactor the spi_flash clock configuration, and add support for esp32c2
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@@ -28,13 +28,7 @@
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extern "C" {
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#endif
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//Supported clock register values
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#define SPI_FLASH_LL_CLKREG_VAL_5MHZ ((spi_flash_ll_clock_reg_t){.val=0x0000F1CF}) ///< Clock set to 5 MHz
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#define SPI_FLASH_LL_CLKREG_VAL_10MHZ ((spi_flash_ll_clock_reg_t){.val=0x000070C7}) ///< Clock set to 10 MHz
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#define SPI_FLASH_LL_CLKREG_VAL_20MHZ ((spi_flash_ll_clock_reg_t){.val=0x00003043}) ///< Clock set to 20 MHz
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#define SPI_FLASH_LL_CLKREG_VAL_26MHZ ((spi_flash_ll_clock_reg_t){.val=0x00002002}) ///< Clock set to 26 MHz
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#define SPI_FLASH_LL_CLKREG_VAL_40MHZ ((spi_flash_ll_clock_reg_t){.val=0x00001001}) ///< Clock set to 40 MHz
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#define SPI_FLASH_LL_CLKREG_VAL_80MHZ ((spi_flash_ll_clock_reg_t){.val=0x80000000}) ///< Clock set to 80 MHz
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#define SPI_FLASH_LL_CLOCK_FREQUENCY_MHZ (80)
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/// Get the start address of SPI peripheral registers by the host ID
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#define spi_flash_ll_get_hw(host_id) ( ((host_id)==SPI1_HOST) ? &SPI1 :(\
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@@ -52,7 +46,7 @@ extern "C" {
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#define spi_flash_ll_set_dummy_out(dev, out_en, out_lev)
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/// type to store pre-calculated register value in above layers
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typedef typeof(SPI1.clock) spi_flash_ll_clock_reg_t;
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typedef typeof(SPI1.clock.val) spi_flash_ll_clock_reg_t;
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/*------------------------------------------------------------------------------
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* Control
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@@ -281,7 +275,7 @@ static inline void spi_flash_ll_set_read_mode(spi_dev_t *dev, esp_flash_io_mode_
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*/
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static inline void spi_flash_ll_set_clock(spi_dev_t *dev, spi_flash_ll_clock_reg_t *clock_val)
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{
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dev->clock = *clock_val;
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dev->clock.val = *clock_val;
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}
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/**
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@@ -402,6 +396,41 @@ static inline void spi_flash_ll_set_cs_setup(spi_dev_t *dev, uint32_t cs_setup_t
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dev->ctrl2.setup_time = cs_setup_time - 1;
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}
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/**
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* Get the spi flash source clock frequency. Used for calculating
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* the divider parameters.
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*
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* @param host_id SPI host id. Not used in this function, but to keep
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* compatibility with other targets.
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*
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* @return the frequency of spi flash clock source.(MHz)
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*/
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static inline uint32_t spi_flash_ll_get_source_clock_freq_mhz(uint8_t host_id)
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{
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return SPI_FLASH_LL_CLOCK_FREQUENCY_MHZ;
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}
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/**
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* Calculate spi_flash clock frequency division parameters for register.
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*
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* @param host_id SPI host id. Not used in this function, but to keep
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* compatibility with other targets.
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* @param clkdiv frequency division factor
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*
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* @return Register setting for the given clock division factor.
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*/
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static inline uint32_t spi_flash_ll_calculate_clock_reg(uint8_t host_id, uint8_t clkdiv)
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{
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uint32_t div_parameter;
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// See comments of `clock` in `spi_struct.h`
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if (clkdiv == 1) {
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div_parameter = (1 << 31);
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} else {
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div_parameter = ((clkdiv - 1) | (((clkdiv/2 - 1) & 0xff) << 6 ) | (((clkdiv - 1) & 0xff) << 12));
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}
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return div_parameter;
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}
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#ifdef __cplusplus
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}
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#endif
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