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Merge branch 'refactor/common_rom_uart_apis' into 'master'

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esp_rom: extract common uart apis into esp_rom_uart.h

See merge request espressif/esp-idf!9313
This commit is contained in:
Angus Gratton
2020-07-21 15:24:21 +08:00
parent 3755fb6597 345606e7f3
commit 442736c5d6
44 changed files with 274 additions and 150 deletions
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1
components/esp32/crosscore_int.c
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@@ -20,7 +20,6 @@
#include "esp_debug_helpers.h"
#include "esp32/rom/ets_sys.h"
#include "esp32/rom/uart.h"
#include "soc/cpu.h"
#include "soc/dport_reg.h"

1
components/esp32/dport_access.c
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@@ -27,7 +27,6 @@
#include "esp_err.h"
#include "esp_intr_alloc.h"
#include "esp32/rom/ets_sys.h"
#include "esp32/rom/uart.h"
#include "soc/cpu.h"
#include "soc/dport_reg.h"

4
components/esp32/sleep_modes.c
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@@ -24,7 +24,7 @@
#include "esp_spi_flash.h"
#include "esp32/rom/cache.h"
#include "esp32/rom/rtc.h"
#include "esp32/rom/uart.h"
#include "esp_rom_uart.h"
#include "soc/cpu.h"
#include "soc/rtc.h"
#include "soc/spi_periph.h"
@@ -151,7 +151,7 @@ void esp_deep_sleep(uint64_t time_in_us)
static void IRAM_ATTR flush_uarts(void)
{
for (int i = 0; i < 3; ++i) {
uart_tx_wait_idle(i);
esp_rom_uart_tx_wait_idle(i);
}
}

8
components/esp32/system_api_esp32.c
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@@ -21,7 +21,7 @@
#include "esp_log.h"
#include "sdkconfig.h"
#include "esp32/rom/cache.h"
#include "esp32/rom/uart.h"
#include "esp_rom_uart.h"
#include "soc/dport_reg.h"
#include "soc/gpio_periph.h"
#include "soc/efuse_periph.h"
@@ -78,9 +78,9 @@ void IRAM_ATTR esp_restart_noos(void)
wdt_hal_write_protect_enable(&wdt1_context);
// Flush any data left in UART FIFOs
uart_tx_wait_idle(0);
uart_tx_wait_idle(1);
uart_tx_wait_idle(2);
esp_rom_uart_tx_wait_idle(0);
esp_rom_uart_tx_wait_idle(1);
esp_rom_uart_tx_wait_idle(2);
#ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
if (esp_ptr_external_ram(get_sp())) {

1
components/esp32/test/test_aes_sha_rsa.c
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@@ -10,7 +10,6 @@
#include "soc/cpu.h"
#include "unity.h"
#include "test_utils.h"
#include "esp32/rom/uart.h"
#include "esp32/rom/sha.h"
#include "soc/uart_periph.h"
#include "soc/dport_reg.h"

13
components/esp32/test/test_dport.c
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@@ -12,8 +12,9 @@
#include "soc/cpu.h"
#include "unity.h"
#include "test_utils.h"
#include "esp32/rom/uart.h"
#include "soc/uart_periph.h"
#include "esp_rom_uart.h"
#include "hal/uart_types.h"
#include "hal/uart_ll.h"
#include "soc/dport_reg.h"
#include "soc/rtc.h"
#include "esp_intr_alloc.h"
@@ -127,9 +128,9 @@ void run_tasks_with_change_freq_cpu(int cpu_freq_mhz)
bool res = rtc_clk_cpu_freq_mhz_to_config(cpu_freq_mhz, &new_config);
assert(res && "invalid frequency value");
uart_tx_wait_idle(uart_num);
esp_rom_uart_tx_wait_idle(uart_num);
rtc_clk_cpu_freq_set_config(&new_config);
uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud);
uart_ll_set_baudrate(UART_LL_GET_HW(uart_num), UART_SCLK_APB, uart_baud);
/* adjust RTOS ticks */
_xt_tick_divisor = cpu_freq_mhz * 1000000 / XT_TICK_PER_SEC;
vTaskDelay(2);
@@ -139,9 +140,9 @@ void run_tasks_with_change_freq_cpu(int cpu_freq_mhz)
run_tasks("accessDPORT", accessDPORT, "accessAPB", accessAPB, 10000);
// return old freq.
uart_tx_wait_idle(uart_num);
esp_rom_uart_tx_wait_idle(uart_num);
rtc_clk_cpu_freq_set_config(&old_config);
uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud);
uart_ll_set_baudrate(UART_LL_GET_HW(uart_num), UART_SCLK_APB, uart_baud);
_xt_tick_divisor = old_config.freq_mhz * 1000000 / XT_TICK_PER_SEC;
}

9
components/esp32/test/test_sleep.c
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@@ -4,12 +4,13 @@
#include "esp_sleep.h"
#include "esp32/clk.h"
#include "driver/rtc_io.h"
#include "esp32/rom/uart.h"
#include "esp_rom_uart.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "soc/gpio_periph.h"
#include "soc/uart_periph.h"
#include "hal/uart_types.h"
#include "hal/uart_ll.h"
#include "soc/rtc.h" // for wakeup trigger defines
#include "soc/rtc_periph.h" // for read rtc registers directly (cause)
#include "soc/soc.h" // for direct register read macros
@@ -175,9 +176,7 @@ TEST_CASE("light sleep duration is correct", "[deepsleep][ignore]")
TEST_CASE("light sleep and frequency switching", "[deepsleep]")
{
#ifndef CONFIG_PM_ENABLE
const int uart_clk_freq = REF_CLK_FREQ;
CLEAR_PERI_REG_MASK(UART_CONF0_REG(CONFIG_ESP_CONSOLE_UART_NUM), UART_TICK_REF_ALWAYS_ON);
uart_div_modify(CONFIG_ESP_CONSOLE_UART_NUM, (uart_clk_freq << 4) / CONFIG_ESP_CONSOLE_UART_BAUDRATE);
uart_ll_set_baudrate(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM), UART_SCLK_REF_TICK, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
#endif
rtc_cpu_freq_config_t config_xtal, config_default;