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https://github.com/espressif/esp-idf.git
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esp_timer: Adds AFFINITY options for task and ISR
These new settings allow you to balance the load on cores. Closes: https://github.com/espressif/esp-idf/issues/10457
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@@ -36,8 +36,15 @@
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static const char *TAG = "esp_timer_systimer";
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#define NOT_USED 0xBAD00FAD
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/* Interrupt handle returned by the interrupt allocator */
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static intr_handle_t s_timer_interrupt_handle;
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#ifdef CONFIG_ESP_TIMER_ISR_AFFINITY_NO_AFFINITY
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#define ISR_HANDLERS (portNUM_PROCESSORS)
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#else
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#define ISR_HANDLERS (1)
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#endif
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static intr_handle_t s_timer_interrupt_handle[ISR_HANDLERS] = { NULL };
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/* Function from the upper layer to be called when the interrupt happens.
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* Registered in esp_timer_impl_init.
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@@ -91,10 +98,47 @@ void IRAM_ATTR esp_timer_impl_set_alarm(uint64_t timestamp)
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static void IRAM_ATTR timer_alarm_isr(void *arg)
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{
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#if ISR_HANDLERS == 1
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// clear the interrupt
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systimer_ll_clear_alarm_int(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER);
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/* Call the upper layer handler */
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(*s_alarm_handler)(arg);
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#else
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static volatile uint32_t processed_by = NOT_USED;
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static volatile bool pending_alarm = false;
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/* CRITICAL section ensures the read/clear is atomic between cores */
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portENTER_CRITICAL_ISR(&s_time_update_lock);
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if (systimer_ll_is_alarm_int_fired(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER)) {
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// Clear interrupt status
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systimer_ll_clear_alarm_int(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER);
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// Is the other core already processing a previous alarm?
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if (processed_by == NOT_USED) {
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// Current core is not processing an alarm yet
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processed_by = xPortGetCoreID();
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do {
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pending_alarm = false;
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// Clear interrupt status
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systimer_ll_clear_alarm_int(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER);
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portEXIT_CRITICAL_ISR(&s_time_update_lock);
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(*s_alarm_handler)(arg);
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portENTER_CRITICAL_ISR(&s_time_update_lock);
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// Another alarm could have occurred while were handling the previous alarm.
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// Check if we need to call the s_alarm_handler again:
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// 1) if the alarm has already been fired, it helps to handle it immediately without an additional ISR call.
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// 2) handle pending alarm that was cleared by the other core in time when this core worked with the current alarm.
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} while (systimer_ll_is_alarm_int_fired(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER) || pending_alarm);
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processed_by = NOT_USED;
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} else {
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// Current core arrived at ISR but the other core is still handling a previous alarm.
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// Once we already cleared the ISR status we need to let the other core know that it was.
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// Set the flag to handle the current alarm by the other core later.
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pending_alarm = true;
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}
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}
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portEXIT_CRITICAL_ISR(&s_time_update_lock);
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#endif // ISR_HANDLERS != 1
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}
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void IRAM_ATTR esp_timer_impl_update_apb_freq(uint32_t apb_ticks_per_us)
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@@ -148,53 +192,55 @@ esp_err_t esp_timer_impl_early_init(void)
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esp_err_t esp_timer_impl_init(intr_handler_t alarm_handler)
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{
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s_alarm_handler = alarm_handler;
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const int interrupt_lvl = (1 << CONFIG_ESP_TIMER_INTERRUPT_LEVEL) & ESP_INTR_FLAG_LEVELMASK;
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#if SOC_SYSTIMER_INT_LEVEL
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int int_type = 0;
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#else
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int int_type = ESP_INTR_FLAG_EDGE;
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#endif // SOC_SYSTIMER_INT_LEVEL
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esp_err_t err = esp_intr_alloc(ETS_SYSTIMER_TARGET2_EDGE_INTR_SOURCE,
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ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_IRAM | int_type | interrupt_lvl,
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&timer_alarm_isr, NULL, &s_timer_interrupt_handle);
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if (s_timer_interrupt_handle[(ISR_HANDLERS == 1) ? 0 : xPortGetCoreID()] != NULL) {
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ESP_EARLY_LOGE(TAG, "timer ISR is already initialized");
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return ESP_ERR_INVALID_STATE;
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}
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int isr_flags = ESP_INTR_FLAG_INTRDISABLED
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| ((1 << CONFIG_ESP_TIMER_INTERRUPT_LEVEL) & ESP_INTR_FLAG_LEVELMASK)
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#if !SOC_SYSTIMER_INT_LEVEL
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| ESP_INTR_FLAG_EDGE
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#endif
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| ESP_INTR_FLAG_IRAM;
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esp_err_t err = esp_intr_alloc(ETS_SYSTIMER_TARGET2_EDGE_INTR_SOURCE, isr_flags,
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&timer_alarm_isr, NULL,
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&s_timer_interrupt_handle[(ISR_HANDLERS == 1) ? 0 : xPortGetCoreID()]);
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if (err != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "esp_intr_alloc failed (0x%x)", err);
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goto err_intr_alloc;
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return err;
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}
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/* TODO: if SYSTIMER is used for anything else, access to SYSTIMER_INT_ENA_REG has to be
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* protected by a shared spinlock. Since this code runs as part of early startup, this
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* is practically not an issue.
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*/
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systimer_hal_enable_alarm_int(&systimer_hal, SYSTIMER_ALARM_ESPTIMER);
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if (s_alarm_handler == NULL) {
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s_alarm_handler = alarm_handler;
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/* TODO: if SYSTIMER is used for anything else, access to SYSTIMER_INT_ENA_REG has to be
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* protected by a shared spinlock. Since this code runs as part of early startup, this
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* is practically not an issue.
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*/
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systimer_hal_enable_alarm_int(&systimer_hal, SYSTIMER_ALARM_ESPTIMER);
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}
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err = esp_intr_enable(s_timer_interrupt_handle);
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err = esp_intr_enable(s_timer_interrupt_handle[(ISR_HANDLERS == 1) ? 0 : xPortGetCoreID()]);
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if (err != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "esp_intr_enable failed (0x%x)", err);
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goto err_intr_en;
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ESP_EARLY_LOGE(TAG, "Can not enable ISR (0x%0x)", err);
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}
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return ESP_OK;
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err_intr_en:
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systimer_ll_enable_alarm(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER, false);
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/* TODO: may need a spinlock, see the note related to SYSTIMER_INT_ENA_REG in systimer_hal_init */
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systimer_ll_enable_alarm_int(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER, false);
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esp_intr_free(s_timer_interrupt_handle);
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err_intr_alloc:
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s_alarm_handler = NULL;
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return err;
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}
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void esp_timer_impl_deinit(void)
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{
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esp_intr_disable(s_timer_interrupt_handle);
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systimer_ll_enable_alarm(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER, false);
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/* TODO: may need a spinlock, see the note related to SYSTIMER_INT_ENA_REG in systimer_hal_init */
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systimer_ll_enable_alarm_int(systimer_hal.dev, SYSTIMER_ALARM_ESPTIMER, false);
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esp_intr_free(s_timer_interrupt_handle);
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s_timer_interrupt_handle = NULL;
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for (unsigned i = 0; i < ISR_HANDLERS; i++) {
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if (s_timer_interrupt_handle[i] != NULL) {
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esp_intr_disable(s_timer_interrupt_handle[i]);
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esp_intr_free(s_timer_interrupt_handle[i]);
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s_timer_interrupt_handle[i] = NULL;
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}
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}
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s_alarm_handler = NULL;
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}
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