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Merge branch 'feature/efuse_hal' into 'master'
hal: Adds efuse hal layer See merge request espressif/esp-idf!16354
This commit is contained in:
59
components/hal/esp32s3/include/hal/efuse_hal.h
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59
components/hal/esp32s3/include/hal/efuse_hal.h
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/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/soc_caps.h"
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#include "hal/efuse_ll.h"
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#include_next "hal/efuse_hal.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief get chip version
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*/
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uint32_t efuse_hal_get_chip_revision(void);
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/**
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* @brief set eFuse timings
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*
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* @param apb_freq_hz APB frequency in Hz
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*/
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void efuse_hal_set_timing(uint32_t apb_freq_hz);
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/**
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* @brief trigger eFuse read operation
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*/
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void efuse_hal_read(void);
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/**
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* @brief clear registers for programming eFuses
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*/
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void efuse_hal_clear_program_registers(void);
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/**
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* @brief burn eFuses written in programming registers (one block at once)
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*
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* @param block block number
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*/
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void efuse_hal_program(uint32_t block);
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/**
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* @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
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*
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* @param data Pointer to data buffer (length 32 bytes)
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* @param rs_values Pointer to write encoded data to (length 12 bytes)
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*/
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void efuse_hal_rs_calculate(const void *data, void *rs_values);
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#ifdef __cplusplus
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}
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#endif
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105
components/hal/esp32s3/include/hal/efuse_ll.h
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components/hal/esp32s3/include/hal/efuse_ll.h
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/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/efuse_periph.h"
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#include "hal/assert.h"
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#include "esp32s3/rom/efuse.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Always inline these functions even no gcc optimization is applied.
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/******************* eFuse fields *************************/
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_crypt_cnt(void)
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{
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return EFUSE.rd_repeat_data1.reg_spi_boot_crypt_cnt;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_wdt_delay_sel(void)
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{
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return EFUSE.rd_repeat_data1.reg_wdt_delay_sel;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_type(void)
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{
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return EFUSE.rd_repeat_data3.reg_flash_type;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac0(void)
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{
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return EFUSE.rd_mac_spi_sys_0;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac1(void)
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{
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return EFUSE.rd_mac_spi_sys_1.reg_mac_1;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en(void)
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{
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return EFUSE.rd_repeat_data2.reg_secure_boot_en;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_revision(void)
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{
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return 0;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_ver_pkg(void)
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{
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return 0;
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}
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/******************* eFuse control functions *************************/
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__attribute__((always_inline)) static inline bool efuse_ll_get_read_cmd(void)
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{
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return EFUSE.cmd.read_cmd;
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}
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__attribute__((always_inline)) static inline bool efuse_ll_get_pgm_cmd(void)
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{
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return EFUSE.cmd.pgm_cmd;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void)
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{
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EFUSE.cmd.read_cmd = 1;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block)
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{
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HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX);
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EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void)
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{
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EFUSE.conf.op_code = EFUSE_READ_OP_CODE;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void)
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{
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EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE;
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}
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__attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value)
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{
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EFUSE.wr_tim_conf2.pwr_off_num = value;
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}
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/******************* eFuse control functions *************************/
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#ifdef __cplusplus
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}
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#endif
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