Merge branch 'feature/efuse_hal' into 'master'

hal: Adds efuse hal layer

See merge request espressif/esp-idf!16354
This commit is contained in:
Konstantin Kondrashov
2022-02-28 13:38:43 +08:00
87 changed files with 2011 additions and 692 deletions

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@@ -1851,6 +1851,9 @@ extern "C" {
#define EFUSE_MEM_FORCE_PD_V 0x1
#define EFUSE_MEM_FORCE_PD_S 0
#define EFUSE_WRITE_OP_CODE 0x5a5a
#define EFUSE_READ_OP_CODE 0x5aa5
#define EFUSE_CONF_REG (DR_REG_EFUSE_BASE + 0x1CC)
/* EFUSE_OP_CODE : R/W ;bitpos:[15:0] ;default: 16'h0 ; */
/*description: 0x5A5A: Operate programming command 0x5AA5: Operate read command.*/

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@@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _SOC_EFUSE_STRUCT_H_
#define _SOC_EFUSE_STRUCT_H_
#ifdef __cplusplus
@@ -193,7 +185,9 @@ typedef volatile struct efuse_dev_s {
union {
struct {
uint32_t spi_pad_conf_2: 18; /*Stores the second part of SPI_PAD_CONF.*/
uint32_t sys_data_part0_0:14; /*Stores the fist 14 bits of the zeroth part of system data.*/
uint32_t wafer_version: 3;
uint32_t pkg_version: 3;
uint32_t sys_data_part0_0: 8; /*Stores the fist 14 bits of the zeroth part of system data.*/
};
uint32_t val;
} rd_mac_spi_sys_3;

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@@ -1,3 +1,8 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
PROVIDE ( UART0 = 0x60000000 );
PROVIDE ( UART1 = 0x60010000 );
PROVIDE ( SPIMEM1 = 0x60002000 );
@@ -6,6 +11,7 @@ PROVIDE ( GPIO = 0x60004000 );
PROVIDE ( SIGMADELTA = 0x60004f00 );
PROVIDE ( RTCCNTL = 0x60008000 );
PROVIDE ( RTCIO = 0x60008400 );
PROVIDE ( EFUSE = 0x60008800 );
PROVIDE ( HINF = 0x6000B000 );
PROVIDE ( I2S0 = 0x6002d000 );
PROVIDE ( I2C0 = 0x60013000 );