fix(console): enable to select UART1 port for console output

This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
This commit is contained in:
Song Ruo Jing
2023-10-24 11:40:35 +08:00
parent 455cc345f7
commit 46d33e46ef
28 changed files with 132 additions and 149 deletions

View File

@@ -431,6 +431,14 @@ config SOC_GPIO_VALID_GPIO_MASK
hex
default 0x1FFFFFFFFFFFF
config SOC_GPIO_IN_RANGE_MAX
int
default 48
config SOC_GPIO_OUT_RANGE_MAX
int
default 48
config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
hex
default 0x0001FFFFFC000000
@@ -967,10 +975,6 @@ config SOC_UART_SUPPORT_XTAL_CLK
bool
default y
config SOC_UART_REQUIRE_CORE_RESET
bool
default y
config SOC_USB_PERIPH_NUM
bool
default y

View File

@@ -174,6 +174,10 @@
#define SOC_GPIO_VALID_GPIO_MASK (0x1FFFFFFFFFFFFULL & ~(0ULL | BIT22 | BIT23 | BIT24 | BIT25))
// No GPIO is input only
#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK (SOC_GPIO_VALID_GPIO_MASK)
#define SOC_GPIO_IN_RANGE_MAX 48
#define SOC_GPIO_OUT_RANGE_MAX 48
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_26~GPIO_NUM_48)
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x0001FFFFFC000000ULL
@@ -380,7 +384,6 @@
#define SOC_UART_SUPPORT_APB_CLK (1) /*!< Support APB as the clock source */
#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */
#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
#define SOC_UART_REQUIRE_CORE_RESET (1)
/*-------------------------- USB CAPS ----------------------------------------*/
#define SOC_USB_PERIPH_NUM 1