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adc: create common adc hal layer
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Armando
199
components/hal/adc_hal_common.c
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199
components/hal/adc_hal_common.c
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/*
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* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <sys/param.h>
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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#include "hal/adc_hal_common.h"
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#include "hal/adc_ll.h"
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#include "hal/assert.h"
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/*---------------------------------------------------------------
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Controller Setting
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---------------------------------------------------------------*/
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static adc_ll_controller_t get_controller(adc_unit_t unit, adc_hal_work_mode_t work_mode)
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{
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if (unit == ADC_UNIT_1) {
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switch (work_mode) {
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#if SOC_ULP_SUPPORTED
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case ADC_HAL_ULP_MODE:
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return ADC_LL_CTRL_ULP;
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#endif
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case ADC_HAL_SINGLE_READ_MODE:
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#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
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return ADC_LL_CTRL_DIG;
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#elif SOC_ADC_RTC_CTRL_SUPPORTED
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return ADC_LL_CTRL_RTC;
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#endif
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case ADC_HAL_CONTINUOUS_READ_MODE:
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return ADC_LL_CTRL_DIG;
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default:
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abort();
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}
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} else {
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switch (work_mode) {
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#if SOC_ULP_SUPPORTED
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case ADC_HAL_ULP_MODE:
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return ADC_LL_CTRL_ULP;
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#endif
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#if !SOC_ADC_ARBITER_SUPPORTED //No ADC2 arbiter on ESP32
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case ADC_HAL_SINGLE_READ_MODE:
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return ADC_LL_CTRL_RTC;
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case ADC_HAL_CONTINUOUS_READ_MODE:
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return ADC_LL_CTRL_DIG;
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case ADC_HAL_PWDET_MODE:
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return ADC_LL_CTRL_PWDET;
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default:
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abort();
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#else
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default:
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return ADC_LL_CTRL_ARB;
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#endif
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}
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}
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}
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void adc_hal_set_controller(adc_unit_t unit, adc_hal_work_mode_t work_mode)
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{
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adc_ll_controller_t ctrlr = get_controller(unit, work_mode);
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adc_ll_set_controller(unit, ctrlr);
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}
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/*---------------------------------------------------------------
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Arbiter
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---------------------------------------------------------------*/
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#if SOC_ADC_ARBITER_SUPPORTED
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void adc_hal_arbiter_config(adc_arbiter_t *config)
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{
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adc_ll_set_arbiter_work_mode(config->mode);
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adc_ll_set_arbiter_priority(config->rtc_pri, config->dig_pri, config->pwdet_pri);
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}
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#endif // #if SOC_ADC_ARBITER_SUPPORTED
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/*---------------------------------------------------------------
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ADC calibration setting
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---------------------------------------------------------------*/
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#if SOC_ADC_CALIBRATION_V1_SUPPORTED
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//For chips without RTC controller, Digital controller is used to trigger an ADC single read.
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#include "esp_rom_sys.h"
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void adc_hal_calibration_init(adc_unit_t adc_n)
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{
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adc_ll_calibration_init(adc_n);
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}
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static uint32_t s_previous_init_code[SOC_ADC_PERIPH_NUM] = {-1, -1};
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void adc_hal_set_calibration_param(adc_unit_t adc_n, uint32_t param)
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{
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if (param != s_previous_init_code[adc_n]) {
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adc_ll_set_calibration_param(adc_n, param);
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s_previous_init_code[adc_n] = param;
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}
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}
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static void cal_setup(adc_unit_t adc_n, adc_atten_t atten)
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{
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adc_hal_set_controller(adc_n, ADC_HAL_SINGLE_READ_MODE);
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adc_oneshot_ll_disable_all_unit();
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// Enableinternal connect GND (for calibration).
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adc_oneshot_ll_disable_channel(adc_n);
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/**
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* Note:
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* When controlled by RTC controller, when all channels are disabled, HW auto selects channel0 atten param.
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* When controlled by DIG controller, unit and channel are not related to attenuation
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*/
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adc_oneshot_ll_set_atten(adc_n, 0, atten);
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adc_oneshot_ll_enable(adc_n);
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}
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static uint32_t read_cal_channel(adc_unit_t adc_n)
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{
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uint32_t event = (adc_n == ADC_UNIT_1) ? ADC_LL_EVENT_ADC1_ONESHOT_DONE : ADC_LL_EVENT_ADC2_ONESHOT_DONE;
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adc_oneshot_ll_clear_event(event);
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#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
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adc_oneshot_ll_start(false);
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esp_rom_delay_us(5);
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adc_oneshot_ll_start(true);
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#else
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adc_oneshot_ll_start(adc_n);
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#endif
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while(!adc_oneshot_ll_get_event(event));
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uint32_t read_val = -1;
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read_val = adc_oneshot_ll_get_raw_result(adc_n);
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if (adc_oneshot_ll_raw_check_valid(adc_n, read_val) == false) {
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return -1;
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}
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return read_val;
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}
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#define ADC_HAL_CAL_TIMES (10)
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#define ADC_HAL_CAL_OFFSET_RANGE (4096)
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uint32_t adc_hal_self_calibration(adc_unit_t adc_n, adc_atten_t atten, bool internal_gnd)
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{
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if (adc_n == ADC_UNIT_2) {
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adc_arbiter_t config = ADC_ARBITER_CONFIG_DEFAULT();
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adc_hal_arbiter_config(&config);
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}
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cal_setup(adc_n, atten);
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adc_ll_calibration_prepare(adc_n, internal_gnd);
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uint32_t code_list[ADC_HAL_CAL_TIMES] = {0};
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uint32_t code_sum = 0;
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uint32_t code_h = 0;
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uint32_t code_l = 0;
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uint32_t chk_code = 0;
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for (uint8_t rpt = 0 ; rpt < ADC_HAL_CAL_TIMES ; rpt ++) {
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code_h = ADC_HAL_CAL_OFFSET_RANGE;
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code_l = 0;
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chk_code = (code_h + code_l) / 2;
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adc_ll_set_calibration_param(adc_n, chk_code);
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uint32_t self_cal = read_cal_channel(adc_n);
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while (code_h - code_l > 1) {
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if (self_cal == 0) {
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code_h = chk_code;
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} else {
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code_l = chk_code;
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}
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chk_code = (code_h + code_l) / 2;
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adc_ll_set_calibration_param(adc_n, chk_code);
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self_cal = read_cal_channel(adc_n);
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if ((code_h - code_l == 1)) {
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chk_code += 1;
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adc_ll_set_calibration_param(adc_n, chk_code);
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self_cal = read_cal_channel(adc_n);
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}
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}
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code_list[rpt] = chk_code;
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code_sum += chk_code;
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}
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code_l = code_list[0];
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code_h = code_list[0];
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for (uint8_t i = 0 ; i < ADC_HAL_CAL_TIMES ; i++) {
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code_l = MIN(code_l, code_list[i]);
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code_h = MAX(code_h, code_list[i]);
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}
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chk_code = code_h + code_l;
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uint32_t ret = ((code_sum - chk_code) % (ADC_HAL_CAL_TIMES - 2) < 4)
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? (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2)
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: (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2) + 1;
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adc_ll_calibration_finish(adc_n);
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return ret;
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return 0;
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}
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#endif //SOC_ADC_CALIBRATION_V1_SUPPORTED
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