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esp32: Add core dump saving to flash feature
Complimentary changes: 1) Partition table definitions files with core dump partition 2) Special sub-type for core dump partition 3) Special version of spi_flash_xxx 4) espcoredump.py is script to get core dump from flash and print useful info 5) FreeRTOS API was extended to get tasks snapshots
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@@ -141,6 +141,29 @@ void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu()
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esp_intr_noniram_enable();
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}
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void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu_panic()
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{
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const uint32_t cpuid = xPortGetCoreID();
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const uint32_t other_cpuid = (cpuid == 0) ? 1 : 0;
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// do not care about other CPU, it was halted upon entering panic handler
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spi_flash_disable_cache(other_cpuid, &s_flash_op_cache_state[other_cpuid]);
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// Kill interrupts that aren't located in IRAM
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esp_intr_noniram_disable();
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// Disable cache on this CPU as well
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spi_flash_disable_cache(cpuid, &s_flash_op_cache_state[cpuid]);
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}
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void IRAM_ATTR spi_flash_enable_interrupts_caches_panic()
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{
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const uint32_t cpuid = xPortGetCoreID();
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// Re-enable cache on this CPU
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spi_flash_restore_cache(cpuid, s_flash_op_cache_state[cpuid]);
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// Re-enable non-iram interrupts
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esp_intr_noniram_enable();
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}
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#else // CONFIG_FREERTOS_UNICORE
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void spi_flash_init_lock()
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@@ -172,6 +195,22 @@ void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu()
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esp_intr_noniram_enable();
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}
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void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu_panic()
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{
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// Kill interrupts that aren't located in IRAM
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esp_intr_noniram_disable();
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// Disable cache on this CPU as well
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spi_flash_disable_cache(0, &s_flash_op_cache_state[0]);
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}
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void IRAM_ATTR spi_flash_enable_interrupts_caches_panic()
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{
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// Re-enable cache on this CPU
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spi_flash_restore_cache(0, s_flash_op_cache_state[0]);
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// Re-enable non-iram interrupts
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esp_intr_noniram_enable();
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}
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#endif // CONFIG_FREERTOS_UNICORE
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/**
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