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change(hal): control PAU bus clock by hal layer

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This commit is contained in:
wuzhenghui
2024-03-20 20:36:45 +08:00
parent 38fe4e136a
commit 4a64d2fe2c
15 changed files with 53 additions and 43 deletions
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10
components/hal/esp32c6/include/hal/clk_gate_ll.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -78,8 +78,6 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
return PCR_TSENS_CLK_EN;
case PERIPH_SDIO_SLAVE_MODULE:
return PCR_SDIO_SLAVE_CLK_EN;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CLK_EN;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CLK_EN;
default:
@@ -161,8 +159,6 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
return PCR_DS_RST_EN;
case PERIPH_SDIO_SLAVE_MODULE:
return PCR_SDIO_SLAVE_RST_EN;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_RST_EN;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_RST_EN;
default:
@@ -229,8 +225,6 @@ static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
return PCR_TSENS_CLK_CONF_REG;
case PERIPH_SDIO_SLAVE_MODULE:
return PCR_SDIO_SLAVE_CONF_REG;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CONF_REG;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CONF_REG;
default:
@@ -297,8 +291,6 @@ static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
return PCR_TSENS_CLK_CONF_REG;
case PERIPH_SDIO_SLAVE_MODULE:
return PCR_SDIO_SLAVE_CONF_REG;
case PERIPH_REGDMA_MODULE:
return PCR_REGDMA_CONF_REG;
case PERIPH_ASSIST_DEBUG_MODULE:
return PCR_ASSIST_CONF_REG;
default: