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feat(mspi): mspi axi disable feature

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This commit is contained in:
Armando
2025-01-03 15:44:20 +08:00
parent 14b5db0e87
commit 4c869d1f23
2 changed files with 59 additions and 4 deletions
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30
components/hal/esp32p4/include/hal/mspi_ll.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -36,6 +36,8 @@
#include "soc/spi_mem_c_reg.h"
#include "soc/spi1_mem_c_reg.h"
#include "soc/clk_tree_defs.h"
#include "soc/spi_mem_struct.h"
#include "soc/spi_mem_s_struct.h"
#ifdef __cplusplus
extern "C" {
@@ -57,6 +59,8 @@ extern "C" {
#define MSPI_TIMING_LL_FLASH_FAST_MODE_MASK (SPI_MEM_C_FASTRD_MODE)
#define MSPI_TIMING_LL_FLASH_SLOW_MODE_MASK 0
#define MSPI_LL_AXI_DISABLE_SUPPORTED 1
/**
* MSPI DQS ID
*/
@@ -611,6 +615,30 @@ static inline uint32_t mspi_timing_ll_get_invalid_dqs_mask(uint8_t spi_num)
}
}
/**
* Enable AXI access to flash
*
* @param spi_num SPI0 / SPI1
* @param enable Enable / Disable
*/
__attribute__((always_inline))
static inline void mspi_ll_flash_enable_axi_access(uint8_t spi_num, bool enable)
{
SPIMEM0.cache_fctrl.close_axi_inf_en = !enable;
}
/**
* Enable AXI access to PSRAM
*
* @param spi_num SPI0 / SPI1
* @param enable Enable / Disable
*/
__attribute__((always_inline))
static inline void mspi_ll_psram_enable_axi_access(uint8_t spi_num, bool enable)
{
SPIMEM2.mem_cache_fctrl.close_axi_inf_en = !enable;
}
#ifdef __cplusplus
}
#endif