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docs(esp32c5): add support for building C5 docs
This commit is contained in:
Marius Vikhammer
173
docs/en/api-guides/jtag-debugging/esp32c5.inc
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173
docs/en/api-guides/jtag-debugging/esp32c5.inc
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.. This file gets included from other .rst files in this folder.
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.. It contains target-specific snippets.
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.. Comments and '---' lines act as delimiters.
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..
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.. This is necessary mainly because RST doesn't support substitutions
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.. (defined in RST, not in Python) inside code blocks. If that is ever implemented,
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.. These code blocks can be moved back to the main .rst files, with target-specific
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.. file names being replaced by substitutions.
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.. run-openocd
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::
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openocd -f board/esp32c5-builtin.cfg
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.. |run-openocd-device-name| replace:: ESP32-C5 through built-in USB connection
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---
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.. run-openocd-output
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::
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user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32c5-builtin.cfg
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Open On-Chip Debugger v0.11.0-esp32-20221026-85-g0718fffd (2023-01-12-07:28)
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Licensed under GNU GPL v2
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For bug reports, read
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http://openocd.org/doc/doxygen/bugs.html
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Info : only one transport option; autoselect 'jtag'
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Info : esp_usb_jtag: VID set to 0x303a and PID to 0x1001
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Info : esp_usb_jtag: capabilities descriptor set to 0x2000
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Warn : Transport "jtag" was already selected
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WARNING: ESP flash support is disabled!
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force hard breakpoints
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Info : Listening on port 6666 for tcl connections
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Info : Listening on port 4444 for telnet connections
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Info : esp_usb_jtag: serial (60:55:F9:F6:03:3C)
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Info : esp_usb_jtag: Device found. Base speed 24000KHz, div range 1 to 255
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Info : clock speed 24000 kHz
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Info : JTAG tap: esp32c5.cpu tap/device found: 0x0000dc25 (mfg: 0x612 (Espressif Systems), part: 0x000d, ver: 0x0)
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Info : datacount=2 progbufsize=16
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Info : Examined RISC-V core; found 2 harts
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Info : hart 0: XLEN=32, misa=0x40903105
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Info : starting gdb server for esp32c5 on 3333
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Info : Listening on port 3333 for gdb connections
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.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32c5-builtin.cfg``
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---
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.. run-openocd-upload
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::
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openocd -f board/esp32c5-builtin.cfg -c "program_esp filename.bin 0x10000 verify exit"
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---
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.. run-openocd-src-linux
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.. code-block:: bash
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src/openocd -f board/esp32c5-builtin.cfg
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---
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.. run-openocd-src-win
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.. code-block:: batch
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src\openocd -f board/esp32c5-builtin.cfg
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---
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.. idf-py-openocd-default-cfg
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.. |idf-py-def-cfg| replace:: ``-f board/esp32c5-builtin.cfg``
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---
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.. run-openocd-appimage-offset
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::
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openocd -f board/esp32c5-builtin.cfg -c "init; halt; esp appimage_offset 0x210000"
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---
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.. openocd-cfg-files
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.. list-table:: OpenOCD configuration files for ESP32-C5
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:widths: 25 75
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:header-rows: 1
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* - Name
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- Description
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* - ``board/esp32c5-builtin.cfg``
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- Board configuration file for ESP32-C5 through built-in USB, includes target and adapter configuration.
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* - ``board/esp32c5-ftdi.cfg``
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- Board configuration file for ESP32-C5 for via externally connected FTDI-based probe like ESP-Prog, includes target and adapter configuration.
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* - ``target/esp32c5.cfg``
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- ESP32-C5 target configuration file. Can be used together with one of the ``interface/`` configuration files.
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* - ``interface/esp_usb_jtag.cfg``
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- JTAG adapter configuration file for ESP32-C5.
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* - ``interface/ftdi/esp32_devkitj_v1.cfg``
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- JTAG adapter configuration file for ESP-Prog boards.
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---
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.. openocd-target-specific-config-vars
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---
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---
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.. jtag-pins
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.. list-table:: ESP32-C5 pins and JTAG signals
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:widths: 25 75
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:header-rows: 1
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* - ESP32-C5 Pin
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- JTAG Signal
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* - MTDO / GPIO7
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- TDO
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* - MTDI / GPIO5
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- TDI
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* - MTCK / GPIO6
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- TCK
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* - MTMS / GPIO4
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- TMS
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.. |jtag-sel-gpio| replace:: GPIO15
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.. |jtag-gpio-list| replace:: GPIO4-GPIO7
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---
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.. run-openocd-d3
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::
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openocd -l openocd_log.txt -d3 -f board/esp32c5-builtin.cfg
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---
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.. run-openocd-d3-tee
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::
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openocd -d3 -f board/esp32c5-builtin.cfg 2>&1 | tee openocd.log
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---
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.. run-gdb-remotelog
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::
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riscv32-esp-elf-gdb -ex "set remotelogfile gdb_log.txt" <all other options>
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---
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.. devkit-defs
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.. |devkit-name| replace:: ESP32-C5
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.. |devkit-name-with-link| replace:: :doc:`ESP32-C5 <../../hw-reference/index>`
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---
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.. devkit-hw-config
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* Out of the box, ESP32-C5 doesn't need any additional hardware configuration for JTAG debugging.
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---
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@@ -89,7 +89,7 @@ The ESP-IDF bootloader ignores any partition types other than ``app`` (0x00) and
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SubType
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~~~~~~~
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{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4="NOT UPDATED YET"}
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{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4, esp32c5="NOT UPDATED YET"}
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The 8-bit SubType field is specific to a given partition type. ESP-IDF currently only specifies the meaning of the subtype field for ``app`` and ``data`` partition types.
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