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Merge branch 'fix/fix_p4_deepsleep_io_leakage_v5.3' into 'release/v5.3'

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fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage (v5.3)

See merge request espressif/esp-idf!36009
This commit is contained in:
Jiang Jiang Jian
2025-01-17 12:10:46 +08:00
parent 92e1c50800 a18fe20e9b
commit 4e0cb9a140
16 changed files with 170 additions and 5 deletions
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12
components/hal/esp32p4/include/hal/gpio_ll.h
View File

@@ -19,6 +19,7 @@
#include "soc/soc.h"
#include "soc/gpio_periph.h"
#include "soc/gpio_struct.h"
#include "soc/io_mux_reg.h"
#include "soc/io_mux_struct.h"
#include "soc/hp_system_struct.h"
#include "soc/lp_iomux_struct.h"
@@ -691,6 +692,7 @@ static inline void gpio_ll_force_unhold_all(void)
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_sel_en(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].slp_sel = 1;
@@ -703,6 +705,7 @@ static inline void gpio_ll_sleep_sel_en(gpio_dev_t *hw, uint32_t gpio_num)
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_sel_dis(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].slp_sel = 0;
@@ -714,6 +717,7 @@ static inline void gpio_ll_sleep_sel_dis(gpio_dev_t *hw, uint32_t gpio_num)
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_pullup_dis(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].mcu_wpu = 0;
@@ -725,6 +729,7 @@ static inline void gpio_ll_sleep_pullup_dis(gpio_dev_t *hw, uint32_t gpio_num)
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_pullup_en(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].mcu_wpu = 1;
@@ -736,6 +741,7 @@ static inline void gpio_ll_sleep_pullup_en(gpio_dev_t *hw, uint32_t gpio_num)
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_pulldown_en(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].mcu_wpd = 1;
@@ -747,6 +753,7 @@ static inline void gpio_ll_sleep_pulldown_en(gpio_dev_t *hw, uint32_t gpio_num)
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_pulldown_dis(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].mcu_wpd = 0;
@@ -758,6 +765,7 @@ static inline void gpio_ll_sleep_pulldown_dis(gpio_dev_t *hw, uint32_t gpio_num)
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_input_disable(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].mcu_ie = 0;
@@ -769,6 +777,7 @@ static inline void gpio_ll_sleep_input_disable(gpio_dev_t *hw, uint32_t gpio_num
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_input_enable(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].mcu_ie = 1;
@@ -780,6 +789,7 @@ static inline void gpio_ll_sleep_input_enable(gpio_dev_t *hw, uint32_t gpio_num)
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_output_disable(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].mcu_oe = 0;
@@ -791,11 +801,13 @@ static inline void gpio_ll_sleep_output_disable(gpio_dev_t *hw, uint32_t gpio_nu
* @param hw Peripheral GPIO hardware instance address.
* @param gpio_num GPIO number
*/
__attribute__((always_inline))
static inline void gpio_ll_sleep_output_enable(gpio_dev_t *hw, uint32_t gpio_num)
{
IO_MUX.gpio[gpio_num].mcu_oe = 1;
}
#ifdef __cplusplus
}
#endif

11
components/hal/esp32p4/include/hal/pmu_ll.h
View File

@@ -348,6 +348,17 @@ FORCE_INLINE_ATTR void pmu_ll_imm_set_lp_rootclk_sel(pmu_dev_t *hw, bool rootclk
}
}
FORCE_INLINE_ATTR void pmu_ll_imm_set_pad_slp_sel(pmu_dev_t *hw, bool sleep_sel)
{
if (sleep_sel) {
// Switch the pad configuration from active state to sleep state
hw->imm.pad_hold_all.tie_high_pad_slp_sel = 1;
} else {
// Switch the pad configuration from sleep state to active state
hw->imm.pad_hold_all.tie_low_pad_slp_sel = 1;
}
}
FORCE_INLINE_ATTR void pmu_ll_imm_set_hp_pad_hold_all(pmu_dev_t *hw, bool hold_all)
{
if (hold_all) {