alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-10-06 21:25:02 +00:00
Code Issues Packages Projects Releases Wiki Activity

fix(hal): functions that may generate invalid load/store byte/half-word instructions

Browse Source 
because the APB regsiters can't behave correctly on these instructions
This commit is contained in:
morris
2024-06-14 16:57:48 +08:00
parent dd46392a66
commit 4f03604b2e
16 changed files with 59 additions and 56 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
components/hal/esp32p4/include/hal/emac_ll.h
View File

@@ -628,11 +628,11 @@ static inline void emac_ll_clock_enable_mii(void *ext_regs)
HP_SYS_CLKRST.peri_clk_ctrl00.reg_emac_rx_clk_en = 1;
HP_SYS_CLKRST.peri_clk_ctrl00.reg_emac_rx_clk_src_sel = 1; // 0-pad_emac_txrx_clk, 1-pad_emac_rx_clk
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_rx_clk_div_num = 0; // 25MHz
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl01, reg_emac_rx_clk_div_num, 0); // 25MHz
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_tx_clk_en = 1;
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_tx_clk_src_sel = 1; // 0-pad_emac_txrx_clk, 1-pad_emac_tx_clk
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_tx_clk_div_num = 0; // 25MHz
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl01, reg_emac_tx_clk_div_num, 0); // 25MHz
LP_AON_CLKRST.hp_clk_ctrl.hp_pad_emac_tx_clk_en = 1;
LP_AON_CLKRST.hp_clk_ctrl.hp_pad_emac_rx_clk_en = 1;
@@ -653,11 +653,11 @@ static inline void emac_ll_clock_enable_rmii_input(void *ext_regs)
HP_SYS_CLKRST.peri_clk_ctrl00.reg_emac_rx_clk_en = 1;
HP_SYS_CLKRST.peri_clk_ctrl00.reg_emac_rx_clk_src_sel = 0; // 0-pad_emac_txrx_clk, 1-pad_emac_rx_clk
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_rx_clk_div_num = 1; // set default divider
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl01, reg_emac_rx_clk_div_num, 1); // set default divider
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_tx_clk_en = 1;
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_tx_clk_src_sel = 0; // 0-pad_emac_txrx_clk, 1-pad_emac_tx_clk
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_tx_clk_div_num = 1; // set default divider
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl01, reg_emac_tx_clk_div_num, 1); // set default divider
LP_AON_CLKRST.hp_clk_ctrl.hp_pad_emac_tx_clk_en = 0;
LP_AON_CLKRST.hp_clk_ctrl.hp_pad_emac_rx_clk_en = 0;
@@ -670,8 +670,8 @@ static inline void emac_ll_clock_enable_rmii_input(void *ext_regs)
static inline void emac_ll_clock_rmii_rx_tx_div(void *ext_regs, int div)
{
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_rx_clk_div_num = div;
HP_SYS_CLKRST.peri_clk_ctrl01.reg_emac_tx_clk_div_num = div;
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl01, reg_emac_rx_clk_div_num, div);
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl01, reg_emac_tx_clk_div_num, div);
}
/// use a macro to wrap the function, force the caller to use it in a critical section