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feat(uart): add LP-UART GPIO support

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This commit is contained in:
gaoxu
2023-09-25 11:12:09 +08:00
parent 3e3e928209
commit 4f24f805cc
22 changed files with 353 additions and 397 deletions
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90
components/hal/esp32c6/include/hal/uart_ll.h
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@@ -183,6 +183,51 @@ FORCE_INLINE_ATTR bool uart_ll_is_enabled(uint32_t uart_num)
REG_GET_BIT(uart_clk_config_reg, uart_en_bit) != 0;
}
/**
* @brief Enable the bus clock for uart
* @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
* @param enable true to enable, false to disable
*/
static inline void uart_ll_enable_bus_clock(uart_port_t uart_num, bool enable)
{
switch (uart_num)
{
case 0:
PCR.uart0_conf.uart0_clk_en = enable;
break;
case 1:
PCR.uart1_conf.uart1_clk_en = enable;
break;
default:
// LP_UART
abort();
break;
}
}
/**
* @brief Reset UART module
* @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
*/
static inline void uart_ll_reset_register(uart_port_t uart_num)
{
switch (uart_num)
{
case 0:
PCR.uart0_conf.uart0_rst_en = 1;
PCR.uart0_conf.uart0_rst_en = 0;
break;
case 1:
PCR.uart1_conf.uart1_rst_en = 1;
PCR.uart1_conf.uart1_rst_en = 0;
break;
default:
// LP_UART
abort();
break;
}
}
/**
* @brief Sync the update to UART core clock domain
*
@@ -251,51 +296,6 @@ FORCE_INLINE_ATTR void uart_ll_sclk_disable(uart_dev_t *hw)
}
}
/**
* @brief Enable the bus clock for uart
* @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
* @param enable true to enable, false to disable
*/
static inline void uart_ll_enable_bus_clock(uart_port_t uart_num, bool enable)
{
switch (uart_num)
{
case 0:
PCR.uart0_conf.uart0_clk_en = enable;
break;
case 1:
PCR.uart1_conf.uart1_clk_en = enable;
break;
default:
// LP_UART
abort();
break;
}
}
/**
* @brief Reset UART module
* @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).
*/
static inline void uart_ll_reset_register(uart_port_t uart_num)
{
switch (uart_num)
{
case 0:
PCR.uart0_conf.uart0_rst_en = 1;
PCR.uart0_conf.uart0_rst_en = 0;
break;
case 1:
PCR.uart1_conf.uart1_rst_en = 1;
PCR.uart1_conf.uart1_rst_en = 0;
break;
default:
// LP_UART
abort();
break;
}
}
/**
* @brief Set the UART source clock.
*