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fix(mspi): fixed cpu and mspi freq mismatch issue when in dfs/sleep on p4
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71
components/esp_hw_support/clk_utils.c
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71
components/esp_hw_support/clk_utils.c
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <sys/param.h>
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#include <inttypes.h>
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#include <string.h>
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#include "sdkconfig.h"
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#include "esp_check.h"
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#include "esp_log.h"
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#include "soc/soc_caps.h"
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#include "soc/rtc.h"
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#include "hal/clk_tree_ll.h"
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#include "esp_private/mspi_timing_tuning.h"
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#include "esp_private/esp_clk_utils.h"
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#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
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void esp_clk_utils_mspi_speed_mode_sync_before_cpu_freq_switching(uint32_t target_cpu_src_freq, uint32_t target_cpu_freq)
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{
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#if CONFIG_IDF_TARGET_ESP32S3
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(void) target_cpu_freq;
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if (target_cpu_src_freq <= clk_ll_xtal_load_freq_mhz()) {
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mspi_timing_change_speed_mode_cache_safe(true);
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}
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#elif CONFIG_IDF_TARGET_ESP32P4
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(void) target_cpu_src_freq;
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/**
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* Workaround for ESP32P4,
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* f_cpu >= f_mspi
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*/
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if (((target_cpu_freq) < CONFIG_ESPTOOLPY_FLASHFREQ_VAL)
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#if CONFIG_SPIRAM
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|| ((target_cpu_freq) < CONFIG_SPIRAM_SPEED)
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#endif
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) {
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mspi_timing_change_speed_mode_cache_safe(true);
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}
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#else
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(void) target_cpu_src_freq;
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(void) target_cpu_freq;
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#endif
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}
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void esp_clk_utils_mspi_speed_mode_sync_after_cpu_freq_switching(uint32_t target_cpu_src_freq, uint32_t target_cpu_freq)
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{
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#if CONFIG_IDF_TARGET_ESP32S3
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(void) target_cpu_freq;
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if (target_cpu_src_freq > clk_ll_xtal_load_freq_mhz()) {
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mspi_timing_change_speed_mode_cache_safe(false);
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}
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#elif CONFIG_IDF_TARGET_ESP32P4
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(void) target_cpu_src_freq;
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/**
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* Workaround for ESP32P4,
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* f_cpu >= f_mspi
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*/
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if (((target_cpu_freq) >= CONFIG_ESPTOOLPY_FLASHFREQ_VAL)
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#if CONFIG_SPIRAM
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&& ((target_cpu_freq) >= CONFIG_SPIRAM_SPEED)
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#endif
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) {
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mspi_timing_change_speed_mode_cache_safe(false);
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}
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#else
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(void) target_cpu_src_freq;
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(void) target_cpu_freq;
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#endif
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}
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#endif
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