alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-08 04:02:27 +00:00
Code Issues Packages Projects Releases Wiki Activity

refactor(uart): add support to be able to test LP_UART port

Browse Source 
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
This commit is contained in:
Song Ruo Jing
2024-01-24 22:29:13 +08:00
parent dce27c3b09
commit 5276cd4f1d
17 changed files with 347 additions and 141 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
components/esp_driver_uart/test_apps/uart/pytest_uart.py
View File

@@ -1,8 +1,18 @@
# SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import pytest
input_argv = {
'esp32': ['uart'],
'esp32s2': ['uart'],
'esp32s3': ['uart'],
'esp32c3': ['uart'],
'esp32c2': ['uart'],
'esp32c6': ['uart', 'lp_uart'],
'esp32h2': ['uart'],
'esp32p4': ['uart', 'lp_uart'],
}
@pytest.mark.supported_targets
@pytest.mark.temp_skip_ci(targets=['esp32s3', 'esp32p4'], reason='skip due to duplication with test_uart_single_dev_psram, p4 TBD') # TODO: IDF-8971
@@ -16,7 +26,17 @@ import pytest
indirect=True,
)
def test_uart_single_dev(case_tester) -> None: # type: ignore
case_tester.run_all_normal_cases(reset=True)
dut = case_tester.first_dut
chip_type = dut.app.target
for uart_port in input_argv.get(chip_type, []):
for case in case_tester.test_menu:
dut.serial.hard_reset()
dut._get_ready()
dut.confirm_write(case.index, expect_str=f'Running {case.name}...')
dut.expect("select to test 'uart' or 'lp_uart' port", timeout=10)
dut.write(f'{uart_port}')
dut.expect_unity_test_output()
@pytest.mark.esp32s3
@@ -30,4 +50,12 @@ def test_uart_single_dev(case_tester) -> None: # type: ignore
indirect=True,
)
def test_uart_single_dev_psram(case_tester) -> None: # type: ignore
case_tester.run_all_normal_cases(reset=True)
dut = case_tester.first_dut
for case in case_tester.test_menu:
dut.serial.hard_reset()
dut._get_ready()
dut.confirm_write(case.index, expect_str=f'Running {case.name}...')
dut.expect("select to test 'uart' or 'lp_uart' port", timeout=10)
dut.write('uart')
dut.expect_unity_test_output()