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fix(gpio): fix IO output enable control

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oen_sel and oen_inv_sel fields from func_out_sel_cfg register
This commit is contained in:
Song Ruo Jing
2025-02-14 15:28:38 +08:00
parent 1d6bcb86ba
commit 53d8b70e8b
23 changed files with 79 additions and 39 deletions
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4
components/hal/esp32s3/include/hal/gpio_ll.h
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@@ -510,7 +510,7 @@ static inline void gpio_ll_set_input_signal_from(gpio_dev_t *hw, uint32_t signal
*/
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
}
@@ -701,6 +701,8 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, gpio
io_config->pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
io_config->ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
io_config->oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
io_config->oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
io_config->oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
io_config->od = hw->pin[gpio_num].pad_driver;
gpio_ll_get_drive_capability(hw, gpio_num, &(io_config->drv)); // specific workaround in the LL
io_config->fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;