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component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3

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1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and MAC bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
This commit is contained in:
wangmengyang
2022-07-11 11:13:18 +08:00
parent 0dd9e338de
commit 580b57c8b1
7 changed files with 30 additions and 29 deletions
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1
components/bt/controller/esp32c3/bt.c
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@@ -1120,6 +1120,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
#endif
periph_module_enable(PERIPH_BT_MODULE);
periph_module_reset(PERIPH_BT_MODULE);
esp_phy_enable();
s_lp_stat.phy_enabled = 1;

10
components/esp32c3/system_api_esp32c3.c
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@@ -92,12 +92,10 @@ void IRAM_ATTR esp_restart_noos(void)
// Reset wifi/bluetooth/ethernet/sdio (bb/mac)
SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG,
SYSTEM_BB_RST | SYSTEM_FE_RST | SYSTEM_MAC_RST |
SYSTEM_BT_RST | SYSTEM_BTMAC_RST | SYSTEM_SDIO_RST |
SYSTEM_EMAC_RST | SYSTEM_MACPWR_RST |
SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | BLE_REG_REST_BIT
|BLE_PWR_REG_REST_BIT | BLE_BB_REG_REST_BIT);
SYSTEM_WIFIBB_RST | SYSTEM_FE_RST | SYSTEM_WIFIMAC_RST |
SYSTEM_SDIO_RST | SYSTEM_EMAC_RST | SYSTEM_MACPWR_RST |
SYSTEM_BTBB_RST | SYSTEM_BTBB_REG_RST |
SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | SYSTEM_RW_BTMAC_REG_RST | SYSTEM_RW_BTLP_REG_RST);
REG_WRITE(SYSTEM_CORE_RST_EN_REG, 0);
// Reset uart0 core first, then reset apb side.

2
components/esp_system/port/soc/esp32c3/clk.c
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@@ -265,7 +265,7 @@ __attribute__((weak)) void esp_perip_clk_init(void)
SYSTEM_CRYPTO_RSA_CLK_EN;
wifi_bt_sdio_clk = SYSTEM_WIFI_CLK_WIFI_EN |
SYSTEM_WIFI_CLK_BT_EN_M |
SYSTEM_WIFI_CLK_UNUSED_BIT5 |
SYSTEM_WIFI_CLK_I2C_CLK_EN |
SYSTEM_WIFI_CLK_UNUSED_BIT12;
}

10
components/esp_wifi/esp32c3/esp_adapter.c
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@@ -399,15 +399,15 @@ static void IRAM_ATTR timer_arm_us_wrapper(void *ptimer, uint32_t us, bool repea
static void wifi_reset_mac_wrapper(void)
{
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST);
}
static void IRAM_ATTR wifi_rtc_enable_iso_wrapper(void)
{
#if CONFIG_MAC_BB_PD
esp_mac_bb_power_down();
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST);
#endif
}
@@ -415,8 +415,8 @@ static void IRAM_ATTR wifi_rtc_disable_iso_wrapper(void)
{
#if CONFIG_MAC_BB_PD
esp_mac_bb_power_up();
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_MAC_RST);
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIMAC_RST);
#endif
}

4
components/esp_wifi/src/phy_init.c
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@@ -291,8 +291,8 @@ void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
if (s_wifi_bt_pd_controller.count++ == 0) {
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
#if CONFIG_IDF_TARGET_ESP32C3
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_BB_RST | SYSTEM_FE_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_BB_RST | SYSTEM_FE_RST);
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIBB_RST | SYSTEM_FE_RST);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, SYSTEM_WIFIBB_RST | SYSTEM_FE_RST);
#endif
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);
}

2
components/hal/esp32c3/include/hal/clk_gate_ll.h
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@@ -97,6 +97,8 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
return SYSTEM_RMT_RST;
case PERIPH_LEDC_MODULE:
return SYSTEM_LEDC_RST;
case PERIPH_BT_MODULE:
return (SYSTEM_BTBB_RST | SYSTEM_BTBB_REG_RST | SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | SYSTEM_RW_BTMAC_REG_RST | SYSTEM_RW_BTLP_REG_RST);
case PERIPH_UART0_MODULE:
return SYSTEM_UART_RST;
case PERIPH_UART1_MODULE:

22
components/soc/esp32c3/include/soc/syscon_reg.h
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@@ -178,7 +178,7 @@ extern "C" {
#define SYSTEM_WIFI_CLK_WIFI_EN_M ((SYSTEM_WIFI_CLK_WIFI_EN_V)<<(SYSTEM_WIFI_CLK_WIFI_EN_S))
#define SYSTEM_WIFI_CLK_WIFI_EN_V 0x0
#define SYSTEM_WIFI_CLK_WIFI_EN_S 0
/* Mask for all Bluetooth clock bits, 11, 12, 16, 17 */
/* Mask for all Bluetooth clock bits, 11, 16, 17 */
#define SYSTEM_WIFI_CLK_BT_EN 0x0
#define SYSTEM_WIFI_CLK_BT_EN_M ((SYSTEM_WIFI_CLK_BT_EN_V)<<(SYSTEM_WIFI_CLK_BT_EN_S))
#define SYSTEM_WIFI_CLK_BT_EN_V 0x0
@@ -194,7 +194,7 @@ extern "C" {
/* Remaining single bit clock masks */
#define SYSTEM_WIFI_CLK_SDIOSLAVE_EN BIT(4)
#define SYSTEM_WIFI_CLK_UNUSED_BIT5 BIT(5)
#define SYSTEM_WIFI_CLK_I2C_CLK_EN BIT(5)
#define SYSTEM_WIFI_CLK_UNUSED_BIT12 BIT(12)
#define SYSTEM_WIFI_CLK_EMAC_EN BIT(14)
#define SYSTEM_WIFI_CLK_RNG_EN BIT(15)
@@ -203,19 +203,19 @@ extern "C" {
#define SYSTEM_WIFI_RST_EN_REG SYSCON_WIFI_RST_EN_REG
/* SYSTEM_WIFI_RST_EN : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
/*description: */
#define SYSTEM_BB_RST BIT(0)
#define SYSTEM_WIFIBB_RST BIT(0)
#define SYSTEM_FE_RST BIT(1)
#define SYSTEM_MAC_RST BIT(2)
#define SYSTEM_BT_RST BIT(3)
#define SYSTEM_BTMAC_RST BIT(4)
#define SYSTEM_WIFIMAC_RST BIT(2)
#define SYSTEM_BTBB_RST BIT(3) /* Bluetooth Baseband */
#define SYSTEM_BTMAC_RST BIT(4) /* deprecated */
#define SYSTEM_SDIO_RST BIT(5)
#define SYSTEM_EMAC_RST BIT(7)
#define SYSTEM_MACPWR_RST BIT(8)
#define SYSTEM_RW_BTMAC_RST BIT(9)
#define SYSTEM_RW_BTLP_RST BIT(10)
#define BLE_REG_REST_BIT BIT(11)
#define BLE_PWR_REG_REST_BIT BIT(12)
#define BLE_BB_REG_REST_BIT BIT(13)
#define SYSTEM_RW_BTMAC_RST BIT(9) /* Bluetooth MAC */
#define SYSTEM_RW_BTLP_RST BIT(10) /* Bluetooth Low Power Module */
#define SYSTEM_RW_BTMAC_REG_RST BIT(11) /* Bluetooth MAC Regsiters */
#define SYSTEM_RW_BTLP_REG_RST BIT(12) /* Bluetooth Low Power Registers */
#define SYSTEM_BTBB_REG_RST BIT(13) /* Bluetooth Baseband Registers */
#define SYSCON_HOST_INF_SEL_REG (DR_REG_SYSCON_BASE + 0x01C)
/* SYSCON_PERI_IO_SWAP : R/W ;bitpos:[7:0] ;default: 8'h0 ; */