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spi_flash: Move mspi clock source switch to 64M in 2nd bootloader code from rtc_clk.c to bootloader_flash_config_esp32h2.c

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This commit is contained in:
Song Ruo Jing
2023-03-14 19:16:40 +08:00
parent 9813947f62
commit 5816c47457
2 changed files with 8 additions and 2 deletions
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8
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c
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@@ -27,6 +27,7 @@
#include "hal/mmu_hal.h"
#include "hal/cache_hal.h"
#include "hal/mmu_ll.h"
#include "soc/pcr_reg.h"
void bootloader_flash_update_id()
{
@@ -81,6 +82,12 @@ void IRAM_ATTR bootloader_configure_spi_pins(int drv)
esp_rom_gpio_pad_set_drv(wp_gpio_num, drv);
}
static void IRAM_ATTR bootloader_flash_clock_init(void)
{
// At this moment, BBPLL should be enabled, safe to switch MSPI clock source to PLL_F64M (default clock src) to raise speed
REG_SET_FIELD(PCR_MSPI_CONF_REG, PCR_MSPI_CLK_SEL, 2);
}
static void update_flash_config(const esp_image_header_t *bootloader_hdr)
{
uint32_t size;
@@ -180,6 +187,7 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
static void IRAM_ATTR bootloader_init_flash_configure(void)
{
bootloader_flash_clock_init();
bootloader_configure_spi_pins(1);
bootloader_flash_cs_timing_config();
}