esp_hw_support: move test to pytest

components/esp_psram/test_apps/psram/main/CMakeLists.txt

@@ -4,7 +4,7 @@ set(srcs "test_app_main.c"
          "test_psram.c")
 
 if(${target} STREQUAL "esp32")
-    list(APPEND srcs "test_himem.c")
+    list(APPEND srcs "test_himem.c" "test_4mpsram.c")
 endif()
 
 # In order for the cases defined by `TEST_CASE` to be linked into the final elf,

components/esp_psram/test_apps/psram/main/test_4mpsram.c

@@ -0,0 +1,104 @@
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include "esp_heap_caps.h"
+#include "unity.h"
+#include "esp_log.h"
+#include "esp_private/spi_common_internal.h"
+#include "sdkconfig.h"
+
+#if CONFIG_IDF_TARGET_ESP32
+
+static const char TAG[] = "test_psram";
+
+#ifdef CONFIG_SPIRAM
+static void test_psram_content(void)
+{
+    const int test_size = 2048;
+    uint32_t *test_area = heap_caps_malloc(test_size, MALLOC_CAP_SPIRAM);
+
+    size_t p;
+    size_t s=test_size;
+    int errct=0;
+    int initial_err=-1;
+    for (p=0; p<(s/sizeof(int)); p+=4) {
+        test_area[p]=p^0xAAAAAAAA;
+    }
+    for (p=0; p<(s/sizeof(int)); p+=4) {
+        if (test_area[p]!=(p^0xAAAAAAAA)) {
+            errct++;
+            if (errct==1) initial_err=p*4;
+        }
+    }
+    if (errct) {
+        ESP_LOGE(TAG, "SPI SRAM memory test fail. %d/%d writes failed, first @ %p\n", errct, s/32, initial_err+test_area);
+        TEST_FAIL();
+    } else {
+        ESP_LOGI(TAG, "SPI SRAM memory test OK");
+    }
+
+    free(test_area);
+}
+#endif
+
+bool psram_is_32mbit_ver0(void);
+
+static void test_spi_bus_occupy(spi_host_device_t expected_occupied_host)
+{
+    bool claim_hspi = spicommon_periph_claim(HSPI_HOST, "ut-hspi");
+    if (claim_hspi) ESP_LOGI(TAG, "HSPI claimed.");
+
+    bool claim_vspi = spicommon_periph_claim(VSPI_HOST, "ut-vspi");
+    if (claim_vspi) ESP_LOGI(TAG, "VSPI claimed.");
+
+    if (expected_occupied_host == HSPI_HOST) {
+        TEST_ASSERT_FALSE(claim_hspi);
+        TEST_ASSERT(claim_vspi);
+    } else if (expected_occupied_host == VSPI_HOST) {
+        TEST_ASSERT_FALSE(claim_vspi);
+        TEST_ASSERT(claim_hspi);
+    } else {
+        TEST_ASSERT(claim_hspi);
+        TEST_ASSERT(claim_vspi);
+    }
+
+#ifdef CONFIG_SPIRAM
+    test_psram_content();
+#endif
+}
+
+#if CONFIG_SPIRAM_OCCUPY_HSPI_HOST || CONFIG_SPIRAM_OCCUPY_VSPI_HOST
+TEST_CASE("some spi bus occpied by psram", "[psram_4m]")
+{
+// NOTE: this unit test rely on the config that PSRAM of 8MB is used only when CONFIG_SPIRAM_BANKSWITCH_ENABLE is set
+//currently all 8M psram don't need more SPI peripherals
+#if !CONFIG_SPIRAM || !CONFIG_SPIRAM_SPEED_80M || CONFIG_SPIRAM_BANKSWITCH_ENABLE
+#error unexpected test config, only psram 32MBit ver 0 at 80MHz will trigger the workaround
+#endif
+
+    spi_host_device_t host;
+    if (!psram_is_32mbit_ver0()) {
+        TEST_FAIL_MESSAGE("unexpected psram version");
+    }
+
+#if CONFIG_SPIRAM_OCCUPY_HSPI_HOST
+    host = HSPI_HOST;
+#elif CONFIG_SPIRAM_OCCUPY_VSPI_HOST
+    host = VSPI_HOST;
+#endif
+    test_spi_bus_occupy(host);
+}
+#else
+TEST_CASE("can use spi when not being used by psram", "[psram_4m]")
+{
+#if CONFIG_SPIRAM && CONFIG_SPIRAM_SPEED_80M
+#error unexpected test config, some runners using the UT_T1_PSRAMV0 but still perform this test.\
+they will not pass this test at 80MHz.
+#endif
+    test_spi_bus_occupy(-1);
+}
+#endif
+
+#endif // CONFIG_IDF_TARGET_ESP32

components/esp_psram/test_apps/psram/pytest_psram.py

@@ -66,3 +66,19 @@ def test_psram_esp32s3_octal(dut: Dut) -> None:
     dut.expect_exact('Press ENTER to see the list of tests')
     dut.write('*')
     dut.expect_unity_test_output()
+
+
+@pytest.mark.esp32
+@pytest.mark.psramv0
+@pytest.mark.parametrize(
+    'config',
+    [
+        'esp32_hspi',
+        'esp32_vspi',
+    ],
+    indirect=True,
+)
+def test_psram_esp32_psramv0(dut: Dut) -> None:
+    dut.expect_exact('Press ENTER to see the list of tests')
+    dut.write('*')
+    dut.expect_unity_test_output()

components/esp_psram/test_apps/psram/sdkconfig.ci.esp32_hspi

@@ -0,0 +1,7 @@
+CONFIG_IDF_TARGET="esp32"
+CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_SPEED_80M=y
+CONFIG_SPIRAM_OCCUPY_HSPI_HOST=y
+CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
+CONFIG_SPIRAM_BANKSWITCH_ENABLE=n

components/esp_psram/test_apps/psram/sdkconfig.ci.esp32_vspi

@@ -0,0 +1,7 @@
+CONFIG_IDF_TARGET="esp32"
+CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_SPEED_80M=y
+CONFIG_SPIRAM_OCCUPY_VSPI_HOST=y
+CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
+CONFIG_SPIRAM_BANKSWITCH_ENABLE=n