timer_group: correct timer_ll_set_divider

This commit is contained in:
morris
2021-02-01 14:17:10 +08:00
parent be30289364
commit 5a520cacf1
10 changed files with 41 additions and 74 deletions

View File

@@ -26,7 +26,6 @@
#include "i2s_caps.h"
#include "rtc_io_caps.h"
#include "soc_caps.h"
#include "timer_group_caps.h"
#include "cpu_caps.h"
#include "gpio_caps.h"
#include "ledc_caps.h"
@@ -76,6 +75,12 @@
#define SOC_SHA_SUPPORT_SHA224 (1)
#define SOC_SHA_SUPPORT_SHA256 (1)
/*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
#define SOC_TIMER_GROUPS (2)
#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (1)
#define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (54)
#define SOC_TIMER_GROUP_SUPPORT_XTAL (1)
#define SOC_TIMER_GROUP_TOTAL_TIMERS (SOC_TIMER_GROUPS * SOC_TIMER_GROUP_TIMERS_PER_GROUP)
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS (1) /*!< One RMT group */

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@@ -1,24 +0,0 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#define SOC_TIMER_GROUP_SUPPORT_XTAL (1)
#define SOC_TIMER_GROUP_XTAL_MHZ (40)
#define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (54)
#define SOC_TIMER_GROUP_PRESCALE_BIT_WIDTH (16)
#define SOC_TIMER_GROUPS (2)
#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (1)
#define SOC_TIMER_GROUP_TOTAL_TIMERS (SOC_TIMER_GROUPS * SOC_TIMER_GROUP_TIMERS_PER_GROUP)
#define SOC_TIMER_GROUP_LAYOUT {1,1}

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@@ -206,7 +206,7 @@ typedef volatile struct {
union {
struct {
uint32_t reserved0: 29;
uint32_t clk_is_active: 1;
uint32_t wdt_clk_is_active: 1;
uint32_t timer_clk_is_active: 1;
uint32_t en: 1;
};