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Merge branch 'feature/optimize_chips_active_power' into 'master'

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feat(system): Optimize the power consumption of esp32h2 and esp32c6 in the active state

Closes IDF-5658

See merge request espressif/esp-idf!27798
This commit is contained in:
Wu Zheng Hui
2024-03-14 12:08:33 +08:00
parent 79d8057a8c 0fc97f0e84
commit 5a682c3bbb
45 changed files with 617 additions and 227 deletions
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29
components/esp_driver_gpio/src/gpio.c
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@@ -22,6 +22,13 @@
#include "hal/gpio_hal.h"
#include "esp_rom_gpio.h"
#include "esp_private/esp_gpio_reserve.h"
#include "esp_private/periph_ctrl.h"
#if SOC_LP_IO_CLOCK_IS_INDEPENDENT && !SOC_RTCIO_RCC_IS_INDEPENDENT
#define RTCIO_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define RTCIO_RCC_ATOMIC()
#endif
#if (SOC_RTCIO_PIN_COUNT > 0)
#include "hal/rtc_io_hal.h"
@@ -59,6 +66,9 @@ typedef struct {
gpio_isr_func_t *gpio_isr_func;
gpio_isr_handle_t gpio_isr_handle;
uint64_t isr_clr_on_entry_mask; // for edge-triggered interrupts, interrupt status bits should be cleared before entering per-pin handlers
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_LP_IO_CLOCK_IS_INDEPENDENT
uint32_t gpio_wakeup_mask;
#endif
} gpio_context_t;
static gpio_hal_context_t _gpio_hal = {
@@ -71,6 +81,9 @@ static gpio_context_t gpio_context = {
.isr_core_id = GPIO_ISR_CORE_ID_UNINIT,
.gpio_isr_func = NULL,
.isr_clr_on_entry_mask = 0,
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_LP_IO_CLOCK_IS_INDEPENDENT
.gpio_wakeup_mask = 0,
#endif
};
esp_err_t gpio_pullup_en(gpio_num_t gpio_num)
@@ -978,6 +991,14 @@ esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t int
return ESP_ERR_INVALID_ARG;
}
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
#if SOC_LP_IO_CLOCK_IS_INDEPENDENT
if (gpio_context.gpio_wakeup_mask == 0) {
RTCIO_RCC_ATOMIC() {
rtcio_ll_enable_io_clock(true);
}
}
gpio_context.gpio_wakeup_mask |= (1ULL << gpio_num);
#endif
gpio_hal_deepsleep_wakeup_enable(gpio_context.gpio_hal, gpio_num, intr_type);
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num);
@@ -996,6 +1017,14 @@ esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num)
gpio_hal_deepsleep_wakeup_disable(gpio_context.gpio_hal, gpio_num);
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num);
#endif
#if SOC_LP_IO_CLOCK_IS_INDEPENDENT
gpio_context.gpio_wakeup_mask &= ~(1ULL << gpio_num);
if (gpio_context.gpio_wakeup_mask == 0) {
RTCIO_RCC_ATOMIC() {
rtcio_ll_enable_io_clock(false);
}
}
#endif
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;