Support ELF files loadable with gdb

components/esp32/ld/esp32.ld

@@ -49,6 +49,7 @@ MEMORY
   /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
   iram0_0_seg (RX) :                 org = 0x40080000, len = 0x20000
 
+#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
   /* Even though the segment name is iram, it is actually mapped to flash
   */
   iram0_2_seg (RX) :                 org = 0x400D0018, len = 0x330000-0x18
@@ -58,6 +59,7 @@ MEMORY
     which is flashed to the chip has a 0x18 byte file header. Setting this offset makes it simple to meet the flash
     cache MMU's constraint that (paddr % 64KB == vaddr % 64KB).)
   */
+#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
 
 
   /* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
@@ -72,10 +74,12 @@ MEMORY
   dram0_0_seg (RW) :                 org = 0x3FFB0000 + CONFIG_BT_RESERVE_DRAM,
                                      len = DRAM0_0_SEG_LEN - CONFIG_BT_RESERVE_DRAM
 
+#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
   /* Flash mapped constant data */
   drom0_0_seg (R) :                  org = 0x3F400018, len = 0x400000-0x18
 
   /* (See iram0_2_seg for meaning of 0x18 offset in the above.) */
+#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
 
   /* RTC fast memory (executable). Persists over deep sleep.
    */
@@ -116,3 +120,15 @@ REGION_ALIAS("rtc_data_location", rtc_slow_seg );
 #else
 REGION_ALIAS("rtc_data_location", rtc_data_seg );
 #endif
+
+#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
+  REGION_ALIAS("default_code_seg", iram0_2_seg);
+#else
+  REGION_ALIAS("default_code_seg", iram0_0_seg);
+#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
+
+#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
+  REGION_ALIAS("default_rodata_seg", drom0_0_seg);
+#else
+  REGION_ALIAS("default_rodata_seg", dram0_0_seg);
+#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

components/esp32/ld/esp32.project.ld.in

@@ -161,12 +161,8 @@ SECTIONS
     mapping[iram0_text]
 
     _iram_text_end = ABSOLUTE(.);
-    _iram_end = ABSOLUTE(.);
   } > iram0_0_seg
 
-  ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
-          "IRAM0 segment data does not fit.")
-
   .dram0.data :
   {
     _data_start = ABSOLUTE(.);
@@ -312,7 +308,7 @@ SECTIONS
     *(.tbss.*)
     _thread_local_end = ABSOLUTE(.);
     . = ALIGN(4);
-  } >drom0_0_seg
+  } >default_rodata_seg
 
   .flash.text :
   {
@@ -334,5 +330,25 @@ SECTIONS
        the flash.text segment.
     */
     _flash_cache_start = ABSOLUTE(0);
-  } >iram0_2_seg
+  } >default_code_seg
+
+  /* Marks the end of IRAM code segment */
+  .iram0.text_end (NOLOAD) :
+  {
+    . = ALIGN (4);
+    _iram_end = ABSOLUTE(.);
+  } > iram0_0_seg
+
+  /* Marks the end of data, bss and possibly rodata  */
+  .dram0.heap_start (NOLOAD) :
+  {
+    . = ALIGN (8);
+    _heap_start = ABSOLUTE(.);
+  } > dram0_0_seg
 }
+
+ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
+          "IRAM0 segment data does not fit.")
+
+ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
+          "DRAM segment data does not fit.")

components/esp32/ld/esp32_fragments.lf

@@ -50,8 +50,12 @@ entries:
 
 [scheme:default]
 entries:
-    text -> flash_text
-    rodata -> flash_rodata
+    if APP_BUILD_USE_FLASH_SECTIONS = y:
+        text -> flash_text
+        rodata -> flash_rodata
+    else:
+        text -> iram0_text
+        rodata -> dram0_data
     data -> dram0_data
     bss -> dram0_bss
     common -> dram0_bss