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esp_adc: new esp_adc component and adc drivers

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This commit is contained in:
Armando
2022-07-15 12:52:44 +08:00
parent 9653af8d04
commit 5b523a3313
185 changed files with 7783 additions and 6462 deletions
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38
components/hal/esp32/include/hal/adc_hal.h
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@@ -1,38 +0,0 @@
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/*******************************************************************************
* NOTICE
* The hal is not public api, don't use in application code.
* See readme.md in hal/include/hal/readme.md
******************************************************************************/
// The HAL layer for ADC (esp32 specific part)
#pragma once
#include "hal/adc_ll.h"
#include "hal/adc_types.h"
#include_next "hal/adc_hal.h"
#ifdef __cplusplus
extern "C" {
#endif
/*---------------------------------------------------------------
Hall sensor setting
---------------------------------------------------------------*/
/**
* Start hall convert and return the hall value.
*
* @return Hall value.
*/
int adc_hal_hall_convert(void);
#ifdef __cplusplus
}
#endif

25
components/hal/esp32/include/hal/adc_ll.h
View File

@@ -23,6 +23,10 @@ extern "C" {
#define ADC_LL_EVENT_ADC1_ONESHOT_DONE (1 << 0)
#define ADC_LL_EVENT_ADC2_ONESHOT_DONE (1 << 1)
//On esp32, ADC can only be continuously triggered when `ADC_LL_DEFAULT_CONV_LIMIT_EN == 1`, `ADC_LL_DEFAULT_CONV_LIMIT_NUM != 0`
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 1
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
typedef enum {
ADC_POWER_BY_FSM, /*!< ADC XPD controlled by FSM. Used for polling mode */
ADC_POWER_SW_ON, /*!< ADC XPD controlled by SW. power on. Used for DMA mode */
@@ -131,19 +135,13 @@ static inline void adc_ll_digi_set_convert_limit_num(uint32_t meas_num)
/**
* Enable max conversion number detection for digital controller.
* If the number of ADC conversion is equal to the maximum, the conversion is stopped.
* @note On esp32, this should always be 1 to trigger the ADC continuously
*
* @param enable true: enable; false: disable
*/
static inline void adc_ll_digi_convert_limit_enable(void)
static inline void adc_ll_digi_convert_limit_enable(bool enable)
{
SYSCON.saradc_ctrl2.meas_num_limit = 1;
}
/**
* Disable max conversion number detection for digital controller.
* If the number of ADC conversion is equal to the maximum, the conversion is stopped.
*/
static inline void adc_ll_digi_convert_limit_disable(void)
{
SYSCON.saradc_ctrl2.meas_num_limit = 0;
SYSCON.saradc_ctrl2.meas_num_limit = enable;
}
/**
@@ -339,7 +337,7 @@ static inline void adc_ll_set_sar_clk_div(adc_unit_t adc_n, uint32_t div)
* Set adc output data format for RTC controller.
*
* @param adc_n ADC unit.
* @param bits Output data bits width option, see ``adc_bits_width_t``.
* @param bits Output data bits width option
*/
static inline void adc_oneshot_ll_set_output_bits(adc_unit_t adc_n, adc_bitwidth_t bits)
{
@@ -357,6 +355,9 @@ static inline void adc_oneshot_ll_set_output_bits(adc_unit_t adc_n, adc_bitwidth
case ADC_BITWIDTH_12:
reg_val = 3;
break;
case ADC_BITWIDTH_DEFAULT:
reg_val = 3;
break;
default:
HAL_ASSERT(false);
}