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https://github.com/espressif/esp-idf.git
synced 2025-08-08 04:02:27 +00:00
fix(gpio): fix 8/16-bit gpio, rtc/lp_io register access
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@@ -33,7 +33,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** out_w1ts : WT; bitpos: [7:0]; default: 0;
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/** out_data_w1ts : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to enable the output register LP_IO_OUT_REG of GPIO0 ~
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* GPIO7.\\
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*
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@@ -42,7 +42,7 @@ typedef union {
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* will be set to 1.
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* - Recommended operation: use this register to set LP_IO_OUT_REG.
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*/
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uint32_t out_w1ts:8;
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uint32_t out_data_w1ts:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -53,7 +53,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** out_w1tc : WT; bitpos: [7:0]; default: 0;
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/** out_data_w1tc : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to clear the output register LP_IO_OUT_REG of GPIO0 ~
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* GPIO7.\\
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*
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@@ -62,7 +62,7 @@ typedef union {
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* will be cleared.
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* - Recommended operation: use this register to clear LP_IO_OUT_REG.
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*/
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uint32_t out_w1tc:8;
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uint32_t out_data_w1tc:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -90,7 +90,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** enable_w1ts : WT; bitpos: [7:0]; default: 0;
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/** out_enable_w1ts : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to set the output enable register LP_IO_ENABLE_REG of
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* GPIO0 ~ GPIO7.\\
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*
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@@ -99,7 +99,7 @@ typedef union {
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* LP_IO_ENABLE_REG will be set to 1.
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* - Recommended operation: use this register to set LP_IO_ENABLE_REG.
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*/
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uint32_t enable_w1ts:8;
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uint32_t out_enable_w1ts:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -110,7 +110,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** enable_w1tc : WT; bitpos: [7:0]; default: 0;
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/** out_enable_w1tc : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to clear the output enable register LP_IO_ENABLE_REG of
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* GPIO0 ~ GPIO7.\\
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*
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@@ -119,7 +119,7 @@ typedef union {
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* LP_IO_ENABLE_REG will be cleared.
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* - Recommended operation: use this register to clear LP_IO_ENABLE_REG.
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*/
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uint32_t enable_w1tc:8;
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uint32_t out_enable_w1tc:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -165,7 +165,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** status_w1ts : WT; bitpos: [7:0]; default: 0;
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/** status_intr_w1ts : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to set the interrupt status register LP_IO_STATUS_INT of
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* GPIO0 ~ GPIO7.\\
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*
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@@ -174,7 +174,7 @@ typedef union {
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* LP_IO_STATUS_INT will be set to 1.
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* - Recommended operation: use this register to set LP_IO_STATUS_INT.
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*/
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uint32_t status_w1ts:8;
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uint32_t status_intr_w1ts:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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@@ -185,7 +185,7 @@ typedef union {
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*/
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typedef union {
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struct {
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/** status_w1tc : WT; bitpos: [7:0]; default: 0;
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/** status_intr_w1tc : WT; bitpos: [7:0]; default: 0;
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* Configures whether or not to clear the interrupt status register LP_IO_STATUS_INT
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* of GPIO0 ~ GPIO7. \\
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*
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@@ -194,7 +194,7 @@ typedef union {
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* LP_IO_STATUS_INT will be cleared
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* - ecommended operation: use this register to clear LP_IO_STATUS_INT.
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*/
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uint32_t status_w1tc:8;
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uint32_t status_intr_w1tc:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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