G0: RISC-V targets have now an independent G0 layer

G0 doesn't depend on any G1+ layer for RISC-V based targets

components/hal/esp32c3/include/hal/gdma_ll.h

@@ -5,6 +5,7 @@
  */
 #pragma once
 
+#include <stddef.h> /* Required for NULL constant */
 #include <stdint.h>
 #include <stdbool.h>
 #include "soc/gdma_struct.h"