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refactor(i2c): Make i2c hal layer independent
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C.S.M
206
components/esp_hal_i2c/include/hal/i2c_hal.h
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206
components/esp_hal_i2c/include/hal/i2c_hal.h
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/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*******************************************************************************
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* NOTICE
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* The hal is not public api, don't use in application code.
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* See readme.md in hal/include/hal/readme.md
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******************************************************************************/
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// The HAL layer for I2C
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#pragma once
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#include "soc/soc_caps.h"
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#include "hal/i2c_types.h"
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#if SOC_I2C_SUPPORTED
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#include "hal/i2c_ll.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if SOC_I2C_SUPPORTED
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/**
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* @brief I2C hal Context definition
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*/
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typedef struct {
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i2c_dev_t *dev;
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} i2c_hal_context_t;
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/**
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* @brief I2C hal clock configurations
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*/
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typedef struct {
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uint8_t clk_sel; // clock select
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uint8_t clk_active; // clock active
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hal_utils_clk_div_t clk_div; // clock dividers
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} i2c_hal_sclk_info_t;
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/**
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* @brief Timing configuration structure. Used for I2C reset internally.
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*/
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typedef struct {
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int high_period; /*!< high_period time */
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int low_period; /*!< low_period time */
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int wait_high_period; /*!< wait_high_period time */
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int rstart_setup; /*!< restart setup */
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int start_hold; /*!< start hold time */
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int stop_setup; /*!< stop setup */
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int stop_hold; /*!< stop hold time */
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int sda_sample; /*!< high_period time */
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int sda_hold; /*!< sda hold time */
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int timeout; /*!< timeout value */
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i2c_hal_sclk_info_t clk_cfg; /*!< clock configuration */
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} i2c_hal_timing_config_t;
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#if SOC_I2C_SUPPORT_SLAVE
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/**
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* @brief Init the I2C slave.
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*
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* @param hal Context of the HAL layer
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* @param i2c_num I2C port number
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*
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* @return None
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*/
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void i2c_hal_slave_init(i2c_hal_context_t *hal);
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#endif // SOC_I2C_SUPPORT_SLAVE
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/**
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* @brief Init the I2C master.
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*
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* @param hal Context of the HAL layer
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* @param i2c_num I2C port number
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*
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* @return None
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*/
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void i2c_hal_master_init(i2c_hal_context_t *hal);
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/**
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* @brief Set I2C bus timing with the given frequency
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*
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* @param hal Context of the HAL layer
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* @param scl_freq The scl frequency to be set
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* @param src_clk The source clock of I2C
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* @param source_freq Source clock frequency of I2C
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*
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* @return None
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*/
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void _i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_clock_source_t src_clk, int source_freq);
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#if SOC_PERIPH_CLK_CTRL_SHARED
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define i2c_hal_set_bus_timing(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; _i2c_hal_set_bus_timing(__VA_ARGS__);} while(0)
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#else
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#define i2c_hal_set_bus_timing(...) _i2c_hal_set_bus_timing(__VA_ARGS__)
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#endif
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/**
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* @brief I2C hardware FSM reset
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void i2c_hal_master_fsm_rst(i2c_hal_context_t *hal);
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/**
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* @brief I2C master handle tx interrupt event
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*
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* @param hal Context of the HAL layer
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* @param event Pointer to accept the interrupt event
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*
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* @return None
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*/
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void i2c_hal_master_handle_tx_event(i2c_hal_context_t *hal, i2c_intr_event_t *event);
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/**
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* @brief I2C master handle rx interrupt event
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*
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* @param hal Context of the HAL layer
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* @param event Pointer to accept the interrupt event
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*
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* @return None
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*/
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void i2c_hal_master_handle_rx_event(i2c_hal_context_t *hal, i2c_intr_event_t *event);
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/**
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* @brief Set scl timeout reg value according to given timeout us and source clock frequency
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*
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* @param hal Context of the HAL layer
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* @param timeout_us timeout us
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* @param sclk_clock_hz source clock hz
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*/
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void i2c_hal_master_set_scl_timeout_val(i2c_hal_context_t *hal, uint32_t timeout_us, uint32_t sclk_clock_hz);
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/**
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* @brief Init I2C hal layer
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*
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* @param hal Context of the HAL
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* @param i2c_port I2C port number.
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*/
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void _i2c_hal_init(i2c_hal_context_t *hal, int i2c_port);
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#if SOC_PERIPH_CLK_CTRL_SHARED
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define i2c_hal_init(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; _i2c_hal_init(__VA_ARGS__);} while(0)
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#else
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#define i2c_hal_init(...) _i2c_hal_init(__VA_ARGS__)
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#endif
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/**
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* @brief Deinit I2C hal layer
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*
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* @param hal Context of the HAL
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*/
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void _i2c_hal_deinit(i2c_hal_context_t *hal);
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#if SOC_PERIPH_CLK_CTRL_SHARED
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define i2c_hal_deinit(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; _i2c_hal_deinit(__VA_ARGS__);} while(0)
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#else
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#define i2c_hal_deinit(...) _i2c_hal_deinit(__VA_ARGS__)
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#endif
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/**
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* @brief Start I2C master transaction
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*
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* @param hal Context of the HAL
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*/
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void i2c_hal_master_trans_start(i2c_hal_context_t *hal);
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#if !SOC_I2C_SUPPORT_HW_FSM_RST
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/**
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* @brief Get timing configuration
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*
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* @param hal Context of the HAL
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* @param timing_config Pointer to timing config structure.
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*/
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void i2c_hal_get_timing_config(i2c_hal_context_t *hal, i2c_hal_timing_config_t *timing_config);
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/**
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* @brief Set timing configuration
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*
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* @param hal Context of the HAL
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* @param timing_config Timing config structure.
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*/
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void i2c_hal_set_timing_config(i2c_hal_context_t *hal, i2c_hal_timing_config_t *timing_config);
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#endif // !SOC_I2C_SUPPORT_HW_FSM_RST
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#endif // #if SOC_I2C_SUPPORTED
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#ifdef __cplusplus
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}
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#endif
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136
components/esp_hal_i2c/include/hal/i2c_types.h
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136
components/esp_hal_i2c/include/hal/i2c_types.h
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@@ -0,0 +1,136 @@
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/*
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/soc_caps.h"
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#include "soc/clk_tree_defs.h"
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#include "hal/hal_utils.h"
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/**
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* @brief I2C port number, can be I2C_NUM_0 ~ (I2C_NUM_MAX-1).
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*/
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typedef enum {
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I2C_NUM_0 = 0, /*!< I2C port 0 */
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#if SOC_HP_I2C_NUM >= 2
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I2C_NUM_1, /*!< I2C port 1 */
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#endif /* SOC_HP_I2C_NUM >= 2 */
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#if SOC_LP_I2C_NUM >= 1
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LP_I2C_NUM_0, /*< LP_I2C port 0 */
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#endif /* SOC_LP_I2C_NUM >= 1 */
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I2C_NUM_MAX, /*!< I2C port max */
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} i2c_port_t;
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/**
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* @brief Enumeration for I2C device address bit length
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*/
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typedef enum {
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I2C_ADDR_BIT_LEN_7 = 0, /*!< i2c address bit length 7 */
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#if SOC_I2C_SUPPORT_10BIT_ADDR
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I2C_ADDR_BIT_LEN_10 = 1, /*!< i2c address bit length 10 */
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#endif
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} i2c_addr_bit_len_t;
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/**
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* @brief Data structure for calculating I2C bus timing.
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*/
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typedef struct {
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uint16_t clkm_div; /*!< I2C core clock divider */
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uint16_t scl_low; /*!< I2C scl low period */
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uint16_t scl_high; /*!< I2C scl high period */
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uint16_t scl_wait_high; /*!< I2C scl wait_high period */
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uint16_t sda_hold; /*!< I2C scl low period */
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uint16_t sda_sample; /*!< I2C sda sample time */
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uint16_t setup; /*!< I2C start and stop condition setup period */
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uint16_t hold; /*!< I2C start and stop condition hold period */
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uint16_t tout; /*!< I2C bus timeout period */
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} i2c_hal_clk_config_t;
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typedef enum {
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#if SOC_I2C_SUPPORT_SLAVE
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I2C_MODE_SLAVE = 0, /*!< I2C slave mode */
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#endif
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I2C_MODE_MASTER, /*!< I2C master mode */
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I2C_MODE_MAX,
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} i2c_mode_t;
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typedef enum {
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I2C_MASTER_WRITE = 0, /*!< I2C write data */
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I2C_MASTER_READ, /*!< I2C read data */
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} i2c_rw_t;
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typedef enum {
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I2C_DATA_MODE_MSB_FIRST = 0, /*!< I2C data msb first */
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I2C_DATA_MODE_LSB_FIRST = 1, /*!< I2C data lsb first */
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I2C_DATA_MODE_MAX
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} i2c_trans_mode_t;
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__attribute__((deprecated("please use 'i2c_addr_bit_len_t' instead")))
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typedef enum {
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I2C_ADDR_BIT_7 = 0, /*!< I2C 7bit address for slave mode */
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I2C_ADDR_BIT_10, /*!< I2C 10bit address for slave mode */
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I2C_ADDR_BIT_MAX,
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} i2c_addr_mode_t;
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typedef enum {
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I2C_MASTER_ACK = 0x0, /*!< I2C ack for each byte read */
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I2C_MASTER_NACK = 0x1, /*!< I2C nack for each byte read */
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I2C_MASTER_LAST_NACK = 0x2, /*!< I2C nack for the last byte*/
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I2C_MASTER_ACK_MAX,
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} i2c_ack_type_t;
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/**
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* @brief Enum for I2C slave stretch causes
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*/
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typedef enum {
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I2C_SLAVE_STRETCH_CAUSE_ADDRESS_MATCH = 0, /*!< Stretching SCL low when the slave is read by the master and the address just matched */
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I2C_SLAVE_STRETCH_CAUSE_TX_EMPTY = 1, /*!< Stretching SCL low when TX FIFO is empty in slave mode */
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I2C_SLAVE_STRETCH_CAUSE_RX_FULL = 2, /*!< Stretching SCL low when RX FIFO is full in slave mode */
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I2C_SLAVE_STRETCH_CAUSE_SENDING_ACK = 3, /*!< Stretching SCL low when slave sending ACK */
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} i2c_slave_stretch_cause_t;
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typedef enum {
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I2C_SLAVE_WRITE_BY_MASTER = 0,
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I2C_SLAVE_READ_BY_MASTER = 1,
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} i2c_slave_read_write_status_t;
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/**
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* @brief Enum for i2c working modes.
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*/
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typedef enum {
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I2C_BUS_MODE_MASTER = 0, /*!< I2C works under master mode */
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I2C_BUS_MODE_SLAVE = 1, /*!< I2C works under slave mode */
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} i2c_bus_mode_t;
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#if SOC_I2C_SUPPORTED
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/**
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* @brief I2C group clock source
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*/
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typedef soc_periph_i2c_clk_src_t i2c_clock_source_t;
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#if SOC_LP_I2C_SUPPORTED
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/**
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* @brief LP_UART source clock
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*/
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typedef soc_periph_lp_i2c_clk_src_t lp_i2c_clock_source_t;
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#endif
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#else
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/**
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* @brief Default type
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*/
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typedef int i2c_clock_source_t;
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#endif
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#ifdef __cplusplus
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}
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#endif
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