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feat(freertos/smp): Update SMP FreeRTOS files to V11.1.0

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This commit updates the source files of Amazon SMP FreeRTOS to upstream
V11.1.0 (https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/V11.1.0).

This version contains some new features and bugfixes. See upstream V11.1.0
release notes for more details.

Note: ESP-IDF specific changes to the source file have been preserved
This commit is contained in:
Darian Leung
2024-06-03 02:35:03 +08:00
parent c7bbfaee25
commit 5d75bfdb3c
28 changed files with 2276 additions and 2295 deletions
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26
components/freertos/FreeRTOS-Kernel-SMP/queue.c
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@@ -1,6 +1,6 @@
/*
* FreeRTOS Kernel V11.0.1
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* FreeRTOS Kernel V11.1.0
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-FileCopyrightText: 2021 Amazon.com, Inc. or its affiliates
*
@@ -422,7 +422,7 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
{
/* Queues can be allocated wither statically or dynamically, so
/* Queues can be allocated either statically or dynamically, so
* note this queue was allocated statically in case the queue is
* later deleted. */
pxNewQueue->ucStaticallyAllocated = pdTRUE;
@@ -1194,7 +1194,10 @@ BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue,
* read, instead return a flag to say whether a context switch is required or
* not (i.e. has a task with a higher priority than us been woken by this
* post). */
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
/* MISRA Ref 4.7.1 [Return value shall be checked] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
/* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
{
@@ -1369,7 +1372,10 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
/* MISRA Ref 4.7.1 [Return value shall be checked] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
/* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
@@ -2059,7 +2065,10 @@ BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue,
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
/* MISRA Ref 4.7.1 [Return value shall be checked] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
/* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
@@ -2157,7 +2166,10 @@ BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
/* MISRA Ref 4.7.1 [Return value shall be checked] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#dir-47 */
/* coverity[misra_c_2012_directive_4_7_violation] */
uxSavedInterruptStatus = ( UBaseType_t ) taskENTER_CRITICAL_FROM_ISR();
{
/* Cannot block in an ISR, so check there is data available. */
if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )