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Merge branch 'feat/xip_psram_c5' into 'master'

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psram: xip_psram support on c5/c61, also fixed cache writeback/invalidate not work issue on c61

Closes IDF-8688, IDF-9292, and IDF-11008

See merge request espressif/esp-idf!33265
This commit is contained in:
Armando (Dou Yiwen)
2024-09-06 10:39:57 +08:00
parent c2b5339275 5316a36175
commit 5dff189341
23 changed files with 236 additions and 15 deletions
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3
components/hal/esp32c61/include/hal/mmu_ll.h
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@@ -20,6 +20,8 @@
extern "C" {
#endif
#define MMU_LL_FLASH_MMU_ID 0
#define MMU_LL_PSRAM_MMU_ID 0
#define MMU_LL_END_DROM_ENTRY_VADDR (SOC_DRAM_FLASH_ADDRESS_HIGH - SOC_MMU_PAGE_SIZE)
#define MMU_LL_END_DROM_ENTRY_ID (SOC_MMU_ENTRY_NUM - 1)
@@ -212,7 +214,6 @@ static inline uint32_t mmu_ll_format_paddr(uint32_t mmu_id, uint32_t paddr, mmu_
__attribute__((always_inline)) static inline void mmu_ll_write_entry(uint32_t mmu_id, uint32_t entry_id, uint32_t mmu_val, mmu_target_t target)
{
(void)mmu_id;
(void)target;
uint32_t mmu_raw_value;
if (mmu_ll_cache_encryption_enabled()) {
mmu_val |= SOC_MMU_SENSITIVE;