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feat(cache mmu): c5 support

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This commit is contained in:
Armando
2024-03-18 11:30:31 +08:00
parent ba4b493df8
commit 5efcd8979e
3 changed files with 39 additions and 97 deletions
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18
components/hal/esp32c5/include/hal/mmu_ll.h
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@@ -33,7 +33,6 @@ extern "C" {
*/
static inline uint32_t mmu_ll_vaddr_to_laddr(uint32_t vaddr)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
return vaddr & SOC_MMU_LINEAR_ADDR_MASK;
}
@@ -48,7 +47,6 @@ static inline uint32_t mmu_ll_vaddr_to_laddr(uint32_t vaddr)
*/
static inline uint32_t mmu_ll_laddr_to_vaddr(uint32_t laddr, mmu_vaddr_t vaddr_type, mmu_target_t target)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)target;
(void)vaddr_type;
//On ESP32C5, I/D share the same vaddr range
@@ -57,7 +55,6 @@ static inline uint32_t mmu_ll_laddr_to_vaddr(uint32_t laddr, mmu_vaddr_t vaddr_t
__attribute__((always_inline)) static inline bool mmu_ll_cache_encryption_enabled(void)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
#if SOC_EFUSE_SUPPORTED
unsigned cnt = efuse_ll_get_flash_crypt_cnt();
// 3 bits wide, any odd number - 1 or 3 - bits set means encryption is on
@@ -78,7 +75,6 @@ __attribute__((always_inline)) static inline bool mmu_ll_cache_encryption_enable
__attribute__((always_inline))
static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
uint32_t page_size_code = REG_GET_FIELD(SPI_MEM_MMU_POWER_CTRL_REG(0), SPI_MMU_PAGE_SIZE);
return (page_size_code == 0) ? MMU_PAGE_64KB :
@@ -95,7 +91,6 @@ static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id)
__attribute__((always_inline))
static inline void mmu_ll_set_page_size(uint32_t mmu_id, uint32_t size)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
uint8_t reg_val = (size == MMU_PAGE_64KB) ? 0 :
(size == MMU_PAGE_32KB) ? 1 :
(size == MMU_PAGE_16KB) ? 2 :
@@ -117,7 +112,6 @@ static inline void mmu_ll_set_page_size(uint32_t mmu_id, uint32_t size)
__attribute__((always_inline))
static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len, mmu_vaddr_t type)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
(void)type;
uint32_t vaddr_end = vaddr_start + len - 1;
@@ -136,7 +130,6 @@ static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t
*/
static inline bool mmu_ll_check_valid_paddr_region(uint32_t mmu_id, uint32_t paddr_start, uint32_t len)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
return (paddr_start < (mmu_ll_get_page_size(mmu_id) * SOC_MMU_MAX_PADDR_PAGE_NUM)) &&
(len < (mmu_ll_get_page_size(mmu_id) * SOC_MMU_MAX_PADDR_PAGE_NUM)) &&
@@ -155,7 +148,6 @@ static inline bool mmu_ll_check_valid_paddr_region(uint32_t mmu_id, uint32_t pad
__attribute__((always_inline))
static inline uint32_t mmu_ll_get_entry_id(uint32_t mmu_id, uint32_t vaddr)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
mmu_page_size_t page_size = mmu_ll_get_page_size(mmu_id);
uint32_t shift_code = 0;
@@ -191,7 +183,6 @@ static inline uint32_t mmu_ll_get_entry_id(uint32_t mmu_id, uint32_t vaddr)
__attribute__((always_inline))
static inline uint32_t mmu_ll_format_paddr(uint32_t mmu_id, uint32_t paddr, mmu_target_t target)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
(void)target;
mmu_page_size_t page_size = mmu_ll_get_page_size(mmu_id);
@@ -225,7 +216,6 @@ static inline uint32_t mmu_ll_format_paddr(uint32_t mmu_id, uint32_t paddr, mmu_
*/
__attribute__((always_inline)) static inline void mmu_ll_write_entry(uint32_t mmu_id, uint32_t entry_id, uint32_t mmu_val, mmu_target_t target)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
(void)target;
uint32_t mmu_raw_value;
@@ -247,7 +237,6 @@ __attribute__((always_inline)) static inline void mmu_ll_write_entry(uint32_t mm
*/
__attribute__((always_inline)) static inline uint32_t mmu_ll_read_entry(uint32_t mmu_id, uint32_t entry_id)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
uint32_t mmu_raw_value;
uint32_t ret;
@@ -271,7 +260,6 @@ __attribute__((always_inline)) static inline uint32_t mmu_ll_read_entry(uint32_t
*/
__attribute__((always_inline)) static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
REG_WRITE(SPI_MEM_MMU_ITEM_INDEX_REG(0), entry_id);
REG_WRITE(SPI_MEM_MMU_ITEM_CONTENT_REG(0), SOC_MMU_INVALID);
@@ -285,7 +273,6 @@ __attribute__((always_inline)) static inline void mmu_ll_set_entry_invalid(uint3
__attribute__((always_inline))
static inline void mmu_ll_unmap_all(uint32_t mmu_id)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
for (int i = 0; i < SOC_MMU_ENTRY_NUM; i++) {
mmu_ll_set_entry_invalid(mmu_id, i);
}
@@ -301,7 +288,6 @@ static inline void mmu_ll_unmap_all(uint32_t mmu_id)
*/
static inline bool mmu_ll_check_entry_valid(uint32_t mmu_id, uint32_t entry_id)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
HAL_ASSERT(entry_id < SOC_MMU_ENTRY_NUM);
@@ -319,7 +305,6 @@ static inline bool mmu_ll_check_entry_valid(uint32_t mmu_id, uint32_t entry_id)
*/
static inline mmu_target_t mmu_ll_get_entry_target(uint32_t mmu_id, uint32_t entry_id)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
return MMU_TARGET_FLASH0;
}
@@ -334,7 +319,6 @@ static inline mmu_target_t mmu_ll_get_entry_target(uint32_t mmu_id, uint32_t ent
*/
static inline uint32_t mmu_ll_entry_id_to_paddr_base(uint32_t mmu_id, uint32_t entry_id)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
HAL_ASSERT(entry_id < SOC_MMU_ENTRY_NUM);
@@ -374,7 +358,6 @@ static inline uint32_t mmu_ll_entry_id_to_paddr_base(uint32_t mmu_id, uint32_t e
*/
static inline int mmu_ll_find_entry_id_based_on_map_value(uint32_t mmu_id, uint32_t mmu_val, mmu_target_t target)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
for (int i = 0; i < SOC_MMU_ENTRY_NUM; i++) {
if (mmu_ll_check_entry_valid(mmu_id, i)) {
@@ -399,7 +382,6 @@ static inline int mmu_ll_find_entry_id_based_on_map_value(uint32_t mmu_id, uint3
*/
static inline uint32_t mmu_ll_entry_id_to_vaddr_base(uint32_t mmu_id, uint32_t entry_id, mmu_vaddr_t type)
{
// TODO: [ESP32C5] IDF-8658 (inherit from C6)
(void)mmu_id;
mmu_page_size_t page_size = mmu_ll_get_page_size(mmu_id);
uint32_t shift_code = 0;