feat(esp32c61): add soc peripheral header files (1/2)

components/soc/esp32c61/interrupts.c

@@ -0,0 +1,72 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "soc/interrupts.h"
+
+const char *const esp_isr_names[] = {
+    [0] = "WIFI_MAC",
+    [1] = "WIFI_MAC_NMI",
+    [2] = "WIFI_PWR",
+    [3] = "WIFI_BB",
+    [4] = "BT_MAC",
+    [5] = "BT_BB",
+    [6] = "BT_BB_NMI",
+    [7] = "LP_TIMER",
+    [8] = "COEX",
+    [9] = "BLE_TIMER",
+    [10] = "BLE_SEC",
+    [11] = "I2C_MST",
+    [12] = "ZB_MAC",
+    [13] = "PMU",
+    [14] = "EFUSE",
+    [15] = "LP_RTC_TIMER",
+    [16] = "LP_WDT",
+    [17] = "LP_PERI_TIMEOUT",
+    [18] = "LP_APM_M0",
+    [19] = "CPU_FROM_CPU_0",
+    [20] = "CPU_FROM_CPU_1",
+    [21] = "CPU_FROM_CPU_2",
+    [22] = "CPU_FROM_CPU_3",
+    [23] = "ASSIST_DEBUG",
+    [24] = "TRACE",
+    [25] = "CACHE",
+    [26] = "CPU_PERI_TIMEOUT",
+    [27] = "GPIO_INTERRUPT_PRO",
+    [28] = "GPIO_INTERRUPT_EXT",
+    [29] = "PAU",
+    [30] = "HP_PERI_TIMEOUT",
+    [31] = "MODEM_PERI_TIMEOUT",
+    [32] = "HP_APM_M0",
+    [33] = "HP_APM_M1",
+    [34] = "HP_APM_M2",
+    [35] = "HP_APM_M3",
+    [36] = "MSPI",
+    [37] = "I2S1",
+    [38] = "UART0",
+    [39] = "UART1",
+    [40] = "UART2",
+    [41] = "LEDC",
+    [42] = "USB",
+    [43] = "I2C_EXT0",
+    [44] = "TG0_T0",
+    [45] = "TG0_T1",
+    [46] = "TG0_WDT",
+    [47] = "TG1_T0",
+    [48] = "TG1_T1",
+    [49] = "TG1_WDT",
+    [50] = "SYSTIMER_TARGET0",
+    [51] = "SYSTIMER_TARGET1",
+    [52] = "SYSTIMER_TARGET2",
+    [53] = "APB_ADC",
+    [54] = "DMA_IN_CH0",
+    [55] = "DMA_IN_CH1",
+    [56] = "DMA_OUT_CH0",
+    [57] = "DMA_OUT_CH1",
+    [58] = "GPSPI2",
+    [59] = "SHA",
+    [60] = "ECC",
+    [61] = "ECDSA",
+};