Docs: update CN translation for migration-guides, api-reference, api-guides

This commit is contained in:
Mo Fei Fei
2023-02-20 11:49:54 +08:00
parent f0132be83e
commit 600ed6ac10
7 changed files with 55 additions and 35 deletions

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@@ -82,12 +82,12 @@ Configuration example (master):
int i2c_master_port = 0;
i2c_config_t conf = {
.mode = I2C_MODE_MASTER,
.sda_io_num = I2C_MASTER_SDA_IO, // select GPIO specific to your project
.sda_io_num = I2C_MASTER_SDA_IO, // select SDA GPIO specific to your project
.sda_pullup_en = GPIO_PULLUP_ENABLE,
.scl_io_num = I2C_MASTER_SCL_IO, // select GPIO specific to your project
.scl_io_num = I2C_MASTER_SCL_IO, // select SCL GPIO specific to your project
.scl_pullup_en = GPIO_PULLUP_ENABLE,
.master.clk_speed = I2C_MASTER_FREQ_HZ, // select frequency specific to your project
.clk_flags = 0, // you can use I2C_SCLK_SRC_FLAG_* flags to choose i2c source clock here
.clk_flags = 0, // optional; you can use I2C_SCLK_SRC_FLAG_* flags to choose i2c source clock here
};
.. only:: SOC_I2C_SUPPORT_SLAVE
@@ -98,15 +98,15 @@ Configuration example (master):
int i2c_slave_port = I2C_SLAVE_NUM;
i2c_config_t conf_slave = {
.sda_io_num = I2C_SLAVE_SDA_IO, // select GPIO specific to your project
.sda_io_num = I2C_SLAVE_SDA_IO, // select SDA GPIO specific to your project
.sda_pullup_en = GPIO_PULLUP_ENABLE,
.scl_io_num = I2C_SLAVE_SCL_IO, // select GPIO specific to your project
.scl_io_num = I2C_SLAVE_SCL_IO, // select SCL GPIO specific to your project
.scl_pullup_en = GPIO_PULLUP_ENABLE,
.mode = I2C_MODE_SLAVE,
.slave.addr_10bit_en = 0,
.slave.slave_addr = ESP_SLAVE_ADDR, // address of your project
.slave.slave_addr = ESP_SLAVE_ADDR, // slave address of your project
.slave.maximum_speed = I2C_SLAVE_MAX_SPEED // expected maximum clock speed
.clk_flags = 0, // you can use I2C_SCLK_SRC_FLAG_* flags to choose i2c source clock here
.clk_flags = 0, // optional; you can use I2C_SCLK_SRC_FLAG_* flags to choose I2C source clock here
};
At this stage, :cpp:func:`i2c_param_config` also sets a few other I2C configuration parameters to default values that are defined by the I2C specification. For more details on the values and how to modify them, see :ref:`i2c-api-customized-configuration`.
@@ -281,7 +281,7 @@ The example below shows how to build a command link for an I2C master to read *n
:align: center
Compared to writing data, the command link is populated in Step 4 not with ``i2c_master_write...`` functions but with :cpp:func:`i2c_master_read_byte` and / or :cpp:func:`i2c_master_read`. Also, the last read in Step 5 is configured so that the master does not provide the ACK bit.
Compared to writing data, the command link is populated in Step 4 not with ``i2c_master_write...`` functions but with :cpp:func:`i2c_master_read_byte` and/or :cpp:func:`i2c_master_read`. Also, the last read in Step 5 is configured so that the master does not provide the ACK bit.
Indicating Write or Read

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@@ -13,7 +13,7 @@ For higher-level API functions which work with partitions defined in the :doc:`p
.. note::
``esp_partition_*`` APIs are recommended to be used instead of the lower level ``esp_flash_*`` API functions when accessing the main SPI Flash chip, since they do bounds checking and are guaranteed to calculate correct offsets in flash based on the information in the partition table. ``esp_flash_*`` functions can still be used directly when accessing an external (secondary) SPI flash chip.
Different from the API before IDF v4.0, the functionality of ``esp_flash_*`` APIs is not limited to the "main" SPI flash chip (the same SPI flash chip from which program runs). With different chip pointers, you can access external flash chips connected to not only SPI0/1 but also other SPI buses like SPI2.
Different from the API before ESP-IDF v4.0, the functionality of ``esp_flash_*`` APIs is not limited to the "main" SPI flash chip (the same SPI flash chip from which program runs). With different chip pointers, you can access external flash chips connected to not only SPI0/1 but also other SPI buses like SPI2.
.. note::
@@ -35,7 +35,7 @@ Support for Features of Flash Chips
Quad/Dual Mode Chips
^^^^^^^^^^^^^^^^^^^^
Features of different flashes are implemented in different ways and thus need speical support. The fast/slow read and Dual mode (DOUT/DIO) of almost all 24-bits address flash chips are supported, because they don't need any vendor-specific commands.
Features of different flashes are implemented in different ways and thus need special support. The fast/slow read and Dual mode (DOUT/DIO) of almost all 24-bit address flash chips are supported, because they don't need any vendor-specific commands.
Quad mode (QIO/QOUT) is supported on following chip types:
@@ -49,7 +49,7 @@ Quad mode (QIO/QOUT) is supported on following chip types:
.. note::
For every flash chip vendor listed above will only be supported by default when the flash is officially supported. If you want to enable/disable the flash series you can go through Kconfig manu ``Auto-detect flash chips``.
Flash vendors listed above will only be supported by default when the flash is officially supported. You can also enable or disable the flash series in the Kconfig menu ``Auto-detect flash chips``.
Optional Features
^^^^^^^^^^^^^^^^^
@@ -71,7 +71,7 @@ There are some features that are not supported by all flash chips, or not suppor
- High performance mode (HPM) - means that flash works under high frequency which is higher than 80MHz.
- Flash unique ID - means that flash supports its unique 64-bits ID.
- Flash unique ID - means that flash supports its unique 64-bit ID.
.. only:: esp32c3
@@ -179,7 +179,7 @@ The ``esp_flash_t`` structure holds chip data as well as three important parts o
2. The chip driver, which provides compatibility service to different chips;
3. The OS functions, provide support of some OS functions (e.g. lock, delay) in different stages (1st/2nd boot, or the app).
Host driver
Host Driver
^^^^^^^^^^^
The host driver relies on an interface (``spi_flash_host_driver_t``) defined in the ``spi_flash_types.h`` (in the ``hal/include/hal`` folder). This interface provides some common functions to communicate with the chip.