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clk_tree: prework of introducing clk subsystem control
1. Clean up clk usage in IDF, replace rtc_clk_xtal/apb_freq_get with upper level API esp_clk_xtal/apb_freq 2. Fix small errors and wrong comments related to clock 3. Add clk_tree_defs.h to provide an unified clock id for each chip Modify the NGed drivers to adopt new clock ids
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@@ -18,7 +18,7 @@
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#include "freertos/queue.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "soc/rtc.h"
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#include "esp_private/esp_clk.h"
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#include "driver/mcpwm.h"
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const static char *TAG = "hc-sr04";
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@@ -121,7 +121,7 @@ void app_main(void) {
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uint32_t pulse_count;
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// block and wait for new measurement
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xQueueReceive(cap_queue, &pulse_count, portMAX_DELAY);
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uint32_t pulse_width_us = pulse_count * (1000000.0 / rtc_clk_apb_freq_get());
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uint32_t pulse_width_us = pulse_count * (1000000.0 / esp_clk_apb_freq());
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// following formula is based on: https://www.elecrow.com/download/HC_SR04%20Datasheet.pdf
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if (pulse_width_us > 35000) {
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// out of range
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