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https://github.com/espressif/esp-idf.git
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make bootloader_support support esp32s2beta
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@@ -25,7 +25,7 @@
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#include "soc/nrx_reg.h"
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#include "soc/fe_reg.h"
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#include "soc/rtc.h"
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#include "rom/ets_sys.h"
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#include "esp32s2beta/rom/ets_sys.h"
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#define MHZ (1000000)
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@@ -55,7 +55,7 @@ void rtc_sleep_pd(rtc_sleep_pd_config_t cfg)
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void rtc_sleep_init(rtc_sleep_config_t cfg)
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{
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/* Already defined in rtc init
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/* Already defined in rtc init
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// set 5 PWC state machine times to fit in main state machine time
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REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, RTC_CNTL_PLL_BUF_WAIT_SLP);
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REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_XTL_BUF_WAIT, RTC_CNTL_XTL_BUF_WAIT_SLP);
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@@ -68,7 +68,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
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rtc_sleep_pd(pd_cfg);
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}
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/* This option seems to be unneccessary
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/* This option seems to be unneccessary
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if (cfg.rtc_mem_inf_fpu) {
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SET_PERI_REG_MASK(RTC_CNTL_PWC_REG, RTC_CNTL_MEM_FORCE_PU);
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} else {
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@@ -120,10 +120,10 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
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/* redundant ? People may not want to touch such registers after init
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CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG,
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RTC_CNTL_DG_PAD_FORCE_ISO | RTC_CNTL_DG_PAD_FORCE_NOISO);
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CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG,
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RTC_CNTL_DG_WRAP_FORCE_PU | RTC_CNTL_DG_WRAP_FORCE_PD);
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#ifdef CONFIG_CHIP_IS_ESP32
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CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_FORCE_NOSLEEP);
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#endif
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