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bringup esp32-s3 on FPGA

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This commit is contained in:
morris
2020-07-29 13:13:51 +08:00
parent d7e50c6457
commit 61f89b97c6
97 changed files with 4037 additions and 816 deletions
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13
components/hal/esp32s3/include/hal/clk_gate_ll.h
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@@ -214,6 +214,18 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
}
static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
{
DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
{
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_reset(periph_module_t periph)
{
DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
@@ -228,3 +240,4 @@ static inline bool IRAM_ATTR periph_ll_periph_enabled(periph_module_t periph)
#ifdef __cplusplus
}
#endif