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https://github.com/espressif/esp-idf.git
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bootloader_support: add esp32-s3 initial support
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@@ -24,10 +24,13 @@
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/rtc.h"
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#define CPU_RESET_REASON RTC_SW_CPU_RESET
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define CPU_RESET_REASON RTC_SW_CPU_RESET
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#include "esp32s3/rom/rtc.h"
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#endif
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#include "esp_rom_uart.h"
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void bootloader_clock_configure(void)
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__attribute__((weak)) void bootloader_clock_configure(void)
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{
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// ROM bootloader may have put a lot of text into UART0 FIFO.
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// Wait for it to be printed.
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@@ -38,7 +41,7 @@ void bootloader_clock_configure(void)
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/* Set CPU to 80MHz. Keep other clocks unmodified. */
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int cpu_freq_mhz = 80;
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#if CONFIG_IDF_TARGET_ESP32
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/* On ESP32 rev 0, switching to 80/160 MHz if clock was previously set to
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* 240 MHz may cause the chip to lock up (see section 3.5 of the errata
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@@ -51,23 +54,24 @@ void bootloader_clock_configure(void)
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cpu_freq_mhz = 240;
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}
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#endif
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if (rtc_clk_apb_freq_get() < APB_CLK_FREQ || rtc_get_reset_reason(0) != CPU_RESET_REASON) {
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rtc_clk_config_t clk_cfg = RTC_CLK_CONFIG_DEFAULT();
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#if CONFIG_IDF_TARGET_ESP32
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#if CONFIG_IDF_TARGET_ESP32
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clk_cfg.xtal_freq = CONFIG_ESP32_XTAL_FREQ;
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#endif
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#endif
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/* ESP32-S2 doesn't have XTAL_FREQ choice, always 40MHz */
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clk_cfg.cpu_freq_mhz = cpu_freq_mhz;
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clk_cfg.slow_freq = rtc_clk_slow_freq_get();
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clk_cfg.fast_freq = rtc_clk_fast_freq_get();
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rtc_clk_init(clk_cfg);
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/* As a slight optimization, if 32k XTAL was enabled in sdkconfig, we enable
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* it here. Usually it needs some time to start up, so we amortize at least
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* part of the start up time by enabling 32k XTAL early.
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* App startup code will wait until the oscillator has started up.
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*/
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}
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/* As a slight optimization, if 32k XTAL was enabled in sdkconfig, we enable
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* it here. Usually it needs some time to start up, so we amortize at least
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* part of the start up time by enabling 32k XTAL early.
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* App startup code will wait until the oscillator has started up.
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*/
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#if CONFIG_ESP_SYSTEM_RTC_EXT_XTAL
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if (!rtc_clk_32k_enabled()) {
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rtc_clk_32k_bootstrap(CONFIG_ESP_SYSTEM_RTC_EXT_XTAL_BOOTSTRAP_CYCLES);
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