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gpio: support glitch filter
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66
components/hal/esp32c6/include/hal/gpio_glitch_filter_ll.h
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66
components/hal/esp32c6/include/hal/gpio_glitch_filter_ll.h
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*******************************************************************************
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* NOTICE
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* The hal is not public api, don't use in application code.
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* See readme.md in hal/include/hal/readme.md
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******************************************************************************/
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#pragma once
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#include <stdbool.h>
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#include "hal/assert.h"
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#include "soc/gpio_ext_struct.h"
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#define GPIO_LL_GLITCH_FILTER_MAX_WINDOW 64
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Enable GPIO glitch filter
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*
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* @param hw Glitch filter register base address
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* @param filter_idx Glitch filter index
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* @param enable True to enable, false to disable
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*/
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static inline void gpio_ll_glitch_filter_enable(gpio_glitch_filter_dev_t *hw, uint32_t filter_idx, bool enable)
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{
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hw->glitch_filter_chn[filter_idx].filter_chn_en = enable;
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}
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/**
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* @brief Set the input GPIO for the glitch filter
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*
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* @param hw Glitch filter register base address
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* @param filter_idx Glitch filter index
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_glitch_filter_set_gpio(gpio_glitch_filter_dev_t *hw, uint32_t filter_idx, uint32_t gpio_num)
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{
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hw->glitch_filter_chn[filter_idx].filter_chn_input_io_num = gpio_num;
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}
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/**
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* @brief Set the coefficient of the glitch filter window
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*
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* @param hw Glitch filter register base address
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* @param filter_idx Glitch filter index
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* @param window_width Window width, in IOMUX clock ticks
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* @param window_threshold Window threshold, in IOMUX clock ticks
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*/
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static inline void gpio_ll_glitch_filter_set_window_coeff(gpio_glitch_filter_dev_t *hw, uint32_t filter_idx, uint32_t window_width, uint32_t window_thres)
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{
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HAL_ASSERT(window_thres <= window_width);
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hw->glitch_filter_chn[filter_idx].filter_chn_window_width = window_width - 1;
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hw->glitch_filter_chn[filter_idx].filter_chn_window_thres = window_thres - 1;
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}
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#ifdef __cplusplus
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}
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#endif
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@@ -201,6 +201,28 @@ static inline void gpio_ll_input_enable(gpio_dev_t *hw, uint32_t gpio_num)
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PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG + (gpio_num * 4));
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}
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/**
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* @brief Enable GPIO pin filter
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*
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number of the pad.
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*/
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static inline void gpio_ll_pin_filter_enable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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PIN_FILTER_EN(IO_MUX_GPIO0_REG + (gpio_num * 4));
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}
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/**
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* @brief Disable GPIO pin filter
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*
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* @param hw Peripheral GPIO hardware instance address.
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* @param gpio_num GPIO number of the pad.
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*/
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static inline void gpio_ll_pin_filter_disable(gpio_dev_t *hw, uint32_t gpio_num)
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{
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PIN_FILTER_DIS(IO_MUX_GPIO0_REG + (gpio_num * 4));
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}
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/**
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* @brief Disable output mode on GPIO.
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*
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