bootloader: enable super WDT and BOD reset on C2

This commit is contained in:
Xiao Xufeng
2023-03-08 14:12:34 +08:00
parent a2bbbd1c1c
commit 63089b1f7e
3 changed files with 32 additions and 3 deletions

View File

@@ -3,19 +3,34 @@
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdbool.h>
#include "soc/rtc_cntl_reg.h"
void bootloader_ana_super_wdt_reset_config(bool enable)
{
(void)enable; // ESP32-C2 has none of these features.
REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST);
if (enable) {
REG_CLR_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
} else {
REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_BYPASS_RST);
}
}
void bootloader_ana_bod_reset_config(bool enable)
{
(void)enable; // ESP32-C2 has none of these features.
REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_BOD_RST);
if (enable) {
REG_SET_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
} else {
REG_CLR_BIT(RTC_CNTL_BROWN_OUT_REG, RTC_CNTL_BROWN_OUT_ANA_RST_EN);
}
}
//Not supported but common bootloader calls the function. Do nothing
void bootloader_ana_clock_glitch_reset_config(bool enable)
{
(void)enable; // ESP32-C2 has none of these features.
(void)enable;
}